From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Google-Smtp-Source: ACJfBovJVb9U6pMhVG/hBITALYfM0AyKVjwAHLR2foPERvQzbEpqBlrL0PvjA+49DamYhMAghZT5 ARC-Seal: i=1; a=rsa-sha256; t=1516300526; cv=none; d=google.com; s=arc-20160816; b=SpWvzCxscg8WjrLt5FojFenemBVOjQRdT9iIiVwlnQ0Ejp5onUztONUesuklmpGT4J exy3902QT7hz80hme0qunoITdBxdB6bv0CEKl6iq9UImZEaD7zBH2xYyYsPvbOJf9nBB UHsFVl8edNHPlDwJ8+Z/GzDppP8eVWJlVRmyQ1Al5cLcEO0fLXN5Bb4PUqbDRIAjz5Q/ jVpRkjkukNwad2zfFQZVHX5gTUHfb4v5YFKLqJ0W4GEtprVy66PyhTrOqyZZLMC4ztMs MaU077/xh/+aE+5crIVKjN4q4NG6XKjHMTWjqekW6OiJWA05pcYZzSET8+V4NhyTUQEp 1pGw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=user-agent:in-reply-to:content-disposition:mime-version:references :message-id:subject:cc:to:from:date:arc-authentication-results; bh=vH1CnUvw5i1+UeMZE+9pLTgFzjP9SfWUpuqFKtcXjyc=; b=t8qVqBUi9g9AeuEEXBX7Qf2DXAb06q+UKNbXWLzSUPjmyhuEfebqcMqD6X1ZEirTix dL3DeERIahCS30zNs/Hdx3IOcBcd5GIKaMOh13MdINosF0JUjYrULEumWhm1PCetv2K1 6kmNENM4YtmKtSevyVNdUwDYnX3PFBuavkAM+MX9XgTx59s0/5rSBd6NYyHC9WA6d8lm btGvaTEiauTLiQYDlTOGKQXdNuDAtsFxE6okNs71JRB1d5g/xzHWfKx9MgZgEBHpWtMD mXM59vpY+C0ToQFkyM45bumM3EknOPdqui0/SNrTideafVdJ1FAw01B5jxqFVJDaOP8a cAtQ== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of jpoimboe@redhat.com designates 209.132.183.28 as permitted sender) smtp.mailfrom=jpoimboe@redhat.com; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=redhat.com Authentication-Results: mx.google.com; spf=pass (google.com: domain of jpoimboe@redhat.com designates 209.132.183.28 as permitted sender) smtp.mailfrom=jpoimboe@redhat.com; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=redhat.com Date: Thu, 18 Jan 2018 12:35:23 -0600 From: Josh Poimboeuf To: Borislav Petkov Cc: Peter Zijlstra , David Woodhouse , Thomas Gleixner , linux-kernel@vger.kernel.org, Dave Hansen , Ashok Raj , Tim Chen , Andy Lutomirski , Linus Torvalds , Greg KH , Andrea Arcangeli , Andi Kleen , Arjan Van De Ven , Dan Williams , Paolo Bonzini , Jun Nakajima , Asit Mallick , Jason Baron Subject: Re: [PATCH 29/35] x86/speculation: Add IPBP support Message-ID: <20180118183523.dwsdh3cqq7yy4ph6@treble> References: <20180118134800.711245485@infradead.org> <20180118140153.200767455@infradead.org> <20180118183116.umu4btegm2a5v7ut@pd.tnic> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline In-Reply-To: <20180118183116.umu4btegm2a5v7ut@pd.tnic> User-Agent: Mutt/1.6.0.1 (2016-04-01) X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-LABELS: =?utf-8?b?IlxcSW1wb3J0YW50Ig==?= X-GMAIL-THRID: =?utf-8?q?1589947990506198301?= X-GMAIL-MSGID: =?utf-8?q?1589956341215265132?= X-Mailing-List: linux-kernel@vger.kernel.org List-ID: On Thu, Jan 18, 2018 at 07:31:16PM +0100, Borislav Petkov wrote: > On Thu, Jan 18, 2018 at 02:48:29PM +0100, Peter Zijlstra wrote: > > From: Thomas Gleixner > > <--- Add commit message here. > > > Signed-off-by: Thomas Gleixner > > Signed-off-by: Peter Zijlstra (Intel) > > --- > > arch/x86/include/asm/cpufeatures.h | 4 +++- > > arch/x86/include/asm/msr-index.h | 3 +++ > > arch/x86/include/asm/nospec-branch.h | 9 +++++++++ > > arch/x86/kernel/cpu/bugs.c | 2 ++ > > arch/x86/kernel/cpu/specctrl.c | 9 +++++++++ > > 5 files changed, 26 insertions(+), 1 deletion(-) > > > > --- a/arch/x86/include/asm/cpufeatures.h > > +++ b/arch/x86/include/asm/cpufeatures.h > > @@ -212,8 +212,9 @@ > > > > #define X86_FEATURE_MBA ( 7*32+18) /* Memory Bandwidth Allocation */ > > #define X86_FEATURE_RSB_CTXSW ( 7*32+19) /* Fill RSB on context switches */ > > -#define X86_FEATURE_SPEC_CTRL ( 7*32+20) /* Speculation Control */ > > +#define X86_FEATURE_SPEC_CTRL ( 7*32+20) /* Speculation Control - Intel only */ > > #define X86_FEATURE_IBRS ( 7*32+21) /* Indirect Branch Restricted Speculation */ > > +#define X86_FEATURE_IBPB ( 7*32+22) /* Indirect Branch Prediction Barrier */ > > > > /* Virtualization flags: Linux defined, word 8 */ > > #define X86_FEATURE_TPR_SHADOW ( 8*32+ 0) /* Intel TPR Shadow */ > > @@ -273,6 +274,7 @@ > > #define X86_FEATURE_CLZERO (13*32+ 0) /* CLZERO instruction */ > > #define X86_FEATURE_IRPERF (13*32+ 1) /* Instructions Retired Count */ > > #define X86_FEATURE_XSAVEERPTR (13*32+ 2) /* Always save/restore FP error pointers */ > > +#define X86_FEATURE_AMD_IBPB (13*32+12) /* Indirect Branch Prediction Barrier support */ > > I guess you could make that > > #define X86_FEATURE_AMD_IBPB (13*32+12) /* "" Indirect Branch Prediction Barrier support */ > > (note the "" in the comment) > > so that it doesn't appear in /proc/cpuinfo as those two flags denote the > same thing. Maybe I missed the memo, why do we need both X86_FEATURE_IBPB and X86_FEATURE_AMD_IBPB? -- Josh