From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Google-Smtp-Source: AH8x225Mh1YrlIfosaahv5IGAlP1Og5jrUJYJZ90+d77HMRZ4DxS6TAj9GVyxOHlam9MS3RQ182T ARC-Seal: i=1; a=rsa-sha256; t=1516541946; cv=none; d=google.com; s=arc-20160816; b=ha4xz8V+1cPBO+Phsto1f2wfIgcYoF1n+/MK/q0HkQ1qfUgKkW8UN+4/cQx1eM6Zbb yDw7HgtjJKHLjs82cSEmbSBwwlwiEcZ+sbOdf/Zhc0JLpc3pwwrV985Ty5xwbI2tnzfG 96NK2oeoHUxJDJiEIostmvCBJXzamyXr+4BSVRMNQ1Bdd1v401nZkOYu9aCUeCC+gY92 qmDJSl8o2xKzKWsoR5DhUNeh26Td7vay+wrzUMjtfoA1ie0exwe4tit7/ta+n6Tve0zB xexPIIdGCzK8aApT1eFx9HA5dLBYiHWM36IY7Nap2S1G3DR/wHk0kgWoxBFyYheBozMe /HHw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=user-agent:in-reply-to:content-disposition:mime-version:references :message-id:subject:cc:to:from:date:arc-authentication-results; bh=75KX9t6YOxaiEZ2i5ypSsMPRz9fjapceTQe0pbxf9RE=; b=UlY8xvJA0qJvkf8PPR2tVdVoPKeiTVOukjWO1C+RCTdiS6UrYryWQTWglp7xLWmn0c 5JeH05sZ/hH5c2z5vloV1LdCmO+XyjRErnWwe9rlGZAYOqKXNWNMgRZ5S0SFpTiOqgkS 4FBNXE0xuP4+XwSJgyGgG7QahcMRDEwTKfbAg6SLYJQLc9GZgsOTQfwIKwc+N55ibZvc aYfsOcZRhrEpKDl5XzSixE4QKZ6nRFY3rglPiaXX6kap/OpY3CUSUc4zLCw+MLtpotmU l+MzncFRuM7fRoJyqS9bVpRx48CVCRPJkO2kzHiRBiEbIynis8zxm7ZExFdilD+YIHgi Ke0w== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of bp@alien8.de designates 2a01:4f8:190:11c2::b:1457 as permitted sender) smtp.mailfrom=bp@alien8.de Authentication-Results: mx.google.com; spf=pass (google.com: domain of bp@alien8.de designates 2a01:4f8:190:11c2::b:1457 as permitted sender) smtp.mailfrom=bp@alien8.de Date: Sun, 21 Jan 2018 14:38:56 +0100 From: Borislav Petkov To: David Woodhouse Cc: arjan@linux.intel.com, tglx@linutronix.de, karahmed@amazon.de, x86@kernel.org, linux-kernel@vger.kernel.org, tim.c.chen@linux.intel.com, peterz@infradead.org, pbonzini@redhat.com, ak@linux.intel.com, torvalds@linux-foundation.org, gregkh@linux-foundation.org Subject: Re: [PATCH v2 4/8] x86/pti: Do not enable PTI on fixed Intel processors Message-ID: <20180121133856.aznw4egqrvqxjnir@pd.tnic> References: <1516528149-9370-1-git-send-email-dwmw@amazon.co.uk> <1516528149-9370-5-git-send-email-dwmw@amazon.co.uk> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline In-Reply-To: <1516528149-9370-5-git-send-email-dwmw@amazon.co.uk> User-Agent: NeoMutt/20170609 (1.8.3) X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: =?utf-8?q?1590195142088741574?= X-GMAIL-MSGID: =?utf-8?q?1590209488857377429?= X-Mailing-List: linux-kernel@vger.kernel.org List-ID: On Sun, Jan 21, 2018 at 09:49:05AM +0000, David Woodhouse wrote: > When they advertise the IA32_ARCH_CAPABILITIES MSR and it has the RDCL_NO > bit set, they don't need KPTI either. > > Signed-off-by: David Woodhouse > --- > arch/x86/kernel/cpu/common.c | 9 +++++++-- > 1 file changed, 7 insertions(+), 2 deletions(-) > > diff --git a/arch/x86/kernel/cpu/common.c b/arch/x86/kernel/cpu/common.c > index e5d66e9..80572ae 100644 > --- a/arch/x86/kernel/cpu/common.c > +++ b/arch/x86/kernel/cpu/common.c > @@ -900,8 +900,13 @@ static void __init early_identify_cpu(struct cpuinfo_x86 *c) > > setup_force_cpu_cap(X86_FEATURE_ALWAYS); > > - if (c->x86_vendor != X86_VENDOR_AMD) > - setup_force_cpu_bug(X86_BUG_CPU_MELTDOWN); > + if (c->x86_vendor != X86_VENDOR_AMD) { > + unsigned long ia32_cap = 0; WARNING: Missing a blank line after declarations #36: FILE: arch/x86/kernel/cpu/common.c:905: + unsigned long ia32_cap = 0; + if (cpu_has(c, X86_FEATURE_ARCH_CAPABILITIES)) Yap, that thing seldom is right but this time it makes some sense. Also, unsigned long long ia32_cap = 0; for 32-bit. -- Regards/Gruss, Boris. Good mailing practices for 400: avoid top-posting and trim the reply.