From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Google-Smtp-Source: AH8x225wVG6QleSqZPcOe8VNWs1uF7o7M85/eo5LRdDsqpFjFB+T3upl97U6NukvZy6O/70RWTXC ARC-Seal: i=1; a=rsa-sha256; t=1516557100; cv=none; d=google.com; s=arc-20160816; b=MBn0DsAII3s+q8nYO2y/pluodX4F+ywSMP/zWN6Q6eFd0WBswpSda2Rk3E2Fk46Z+E GNazZKQ0+fzwW48JVBEMqZElbg62f49mJpfx3t9Jl25GgR0cW45+UNHLo1cLLQz183L1 2qsrNNMHLCGx2y3OTEgjOfUlJQHtGkoX5wY0X1JaQDIfG6fDiISa8e9ZYAaznB+fP8BO EWI2DxMP5PnRLb0VnNe1C8ItfHwx0dKSEwXDAd+g4rUhgnvnGMnXvdHvijrNpzlNnfPZ 4YKm2cKruleHwMQI5XTvEriVlCapdt12Eg5UIEtGXgFiknhVgF2BJuxhtFYjQ6AFMzVu Keew== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=user-agent:in-reply-to:content-disposition:mime-version:references :message-id:subject:cc:to:from:date:arc-authentication-results; bh=STC76N8UJ0oja0DMNoTZW2Vkf+GZtiMtcRlxE4+KpD0=; b=O5Iy53LfaXdaxd5TbPQWWrH15f6q2JnYj6yICuhbkuR/rzjqIutrR9ZcuHdkugKDgO 97VlSw1MUzeZlkb7yAT3G+Gtob8d35sJunJ3q0T5yHrXizBHGv+xDNBCcUwnj6cUOsVN DPLpJvJS8sQa5sdTYcAXv7hcCnwdjwwUMJt+IIN+SNRYpQq/QpxjAe/y81pQcYH2r+Cq /oO0EoioKXaqaDXeXxNmDIgxE0gSIQOAkpM3yStPNuTUuZbY3KnskGYLIHt82J1Lk1hZ yXf8VNVkWaTWzGnB5/YzjTSQIUhUJ0WCzrwNBxS2zEveraGvKphG7zuTHJRigdLGVwwh Dydg== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of bp@alien8.de designates 5.9.137.197 as permitted sender) smtp.mailfrom=bp@alien8.de Authentication-Results: mx.google.com; spf=pass (google.com: domain of bp@alien8.de designates 5.9.137.197 as permitted sender) smtp.mailfrom=bp@alien8.de Date: Sun, 21 Jan 2018 18:51:29 +0100 From: Borislav Petkov To: Tom Lendacky Cc: David Woodhouse , David Woodhouse , arjan@linux.intel.com, tglx@linutronix.de, karahmed@amazon.de, x86@kernel.org, linux-kernel@vger.kernel.org, tim.c.chen@linux.intel.com, peterz@infradead.org, pbonzini@redhat.com, ak@linux.intel.com, torvalds@linux-foundation.org, gregkh@linux-foundation.org Subject: Re: [PATCH 2/4] x86/cpufeatures: Add AMD feature bits for Prediction Command Message-ID: <20180121175129.mfyafhlbbgyyogmc@pd.tnic> References: <1516449813-7654-1-git-send-email-dwmw@amazon.co.uk> <1516449813-7654-3-git-send-email-dwmw@amazon.co.uk> <20180121121638.jpwyk4npxjcgqzar@pd.tnic> <4eb681c76b549ddad43544f2b487106c.squirrel@twosheds.infradead.org> <2b3e25cc-286d-8bd0-aeaf-9ac4aae39de8@amd.com> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline In-Reply-To: <2b3e25cc-286d-8bd0-aeaf-9ac4aae39de8@amd.com> User-Agent: NeoMutt/20170609 (1.8.3) X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: =?utf-8?q?1590112908013365211?= X-GMAIL-MSGID: =?utf-8?q?1590225378620965499?= X-Mailing-List: linux-kernel@vger.kernel.org List-ID: On Sun, Jan 21, 2018 at 11:36:32AM -0600, Tom Lendacky wrote: > >>> +#define X86_FEATURE_AMD_PRED_CMD ( 7*32+17) /* Prediction Command MSR > >>> (AMD) */ > > You should use the existing 0x80000008 EBX entry for this. Right, and is the bit called "PredCmd" or so or simply "IBPB" ? -- Regards/Gruss, Boris. Good mailing practices for 400: avoid top-posting and trim the reply.