From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S933065AbeAXXLb (ORCPT ); Wed, 24 Jan 2018 18:11:31 -0500 Received: from shards.monkeyblade.net ([184.105.139.130]:51880 "EHLO shards.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S932294AbeAXXL1 (ORCPT ); Wed, 24 Jan 2018 18:11:27 -0500 Date: Wed, 24 Jan 2018 18:11:26 -0500 (EST) Message-Id: <20180124.181126.1573479768859874669.davem@davemloft.net> To: ivan@de.ibm.com Cc: chunkeey@googlemail.com, robh@kernel.org, netdev@vger.kernel.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH v2 2/2] net/ibm/emac: wrong bit is used for STA control register write From: David Miller In-Reply-To: <20180124125325.56824-2-ivan@de.ibm.com> References: <20180124125325.56824-2-ivan@de.ibm.com> X-Mailer: Mew version 6.7 on Emacs 25.3 / Mule 6.0 (HANACHIRUSATO) Mime-Version: 1.0 Content-Type: Text/Plain; charset=us-ascii Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Ivan Mikhaylov Date: Wed, 24 Jan 2018 15:53:25 +0300 > STA control register has areas of mode and opcodes for opeations. 18 bit is > using for mode selection, where 0 is old MIO/MDIO access method and 1 is > indirect access mode. 19-20 bits are using for setting up read/write > operation(STA opcodes). In current state 'read' is set into old MIO/MDIO mode > with 19 bit and write operation is set into 18 bit which is mode selection, > not a write operation. To correlate write with read we set it into 20 bit. > All those bit operations are MSB 0 based. > > Signed-off-by: Ivan Mikhaylov Applied.