From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751443AbeAYPah (ORCPT ); Thu, 25 Jan 2018 10:30:37 -0500 Received: from mail-pf0-f196.google.com ([209.85.192.196]:44630 "EHLO mail-pf0-f196.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751247AbeAYPaf (ORCPT ); Thu, 25 Jan 2018 10:30:35 -0500 X-Google-Smtp-Source: AH8x224DucbrU9BtiTSxtfdACpER1/1ByFyzqF59Ajt5HzUI6kAph2cs/u41QQoaRVQS0qfOO2MhtQ== Date: Thu, 25 Jan 2018 23:30:25 +0800 From: Dong Aisheng To: Anson Huang Cc: shawnguo@kernel.org, kernel@pengutronix.de, fabio.estevam@nxp.com, robh+dt@kernel.org, aisheng.dong@nxp.com, mark.rutland@arm.com, linux@armlinux.org.uk, Linux-imx@nxp.com, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH] ARM: dts: imx6sx: add pu power domain support Message-ID: <20180125153025.GC24622@b29396-OptiPlex-7040> References: <1516720343-21933-1-git-send-email-Anson.Huang@nxp.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <1516720343-21933-1-git-send-email-Anson.Huang@nxp.com> User-Agent: Mutt/1.5.24 (2015-08-30) Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Tue, Jan 23, 2018 at 11:12:23PM +0800, Anson Huang wrote: > Add PU power domain support, GPU is the only > module inside PU power domain, and PU power > is supplied by LDO_SOC. > > Signed-off-by: Anson Huang > --- > arch/arm/boot/dts/imx6sx.dtsi | 8 ++++++++ > 1 file changed, 8 insertions(+) > > diff --git a/arch/arm/boot/dts/imx6sx.dtsi b/arch/arm/boot/dts/imx6sx.dtsi > index fd78793..42ef4c6 100644 > --- a/arch/arm/boot/dts/imx6sx.dtsi > +++ b/arch/arm/boot/dts/imx6sx.dtsi > @@ -188,6 +188,7 @@ > <&clks IMX6SX_CLK_GPU>, > <&clks IMX6SX_CLK_GPU>; > clock-names = "bus", "core", "shader"; > + power-domains = <&pd_pu>; > }; > > dma_apbh: dma-apbh@1804000 { > @@ -767,6 +768,13 @@ > #address-cells = <1>; > #size-cells = <0>; > > + pd_pu: power-domain@1 { > + reg = <1>; > + #power-domain-cells = <0>; > + power-supply = <®_soc>; I wonder we may not need this as it's a non-stop domain just like we did for arm domain, right? Otherwise, the patch looks fine to me. Acked-by: Dong Aisheng Regards Dong Aisheng > + clocks = <&clks IMX6SX_CLK_GPU>; > + }; > + > pd_pci: power-domain@3 { > reg = <3>; > #power-domain-cells = <0>; > -- > 2.7.4 >