From: Thierry Escande <thierry.escande@collabora.com>
To: Archit Taneja <architt@codeaurora.org>,
Inki Dae <inki.dae@samsung.com>,
Thierry Reding <thierry.reding@gmail.com>,
Sandy Huang <hjc@rock-chips.com>,
Sean Paul <seanpaul@chromium.org>,
David Airlie <airlied@linux.ie>, Tomasz Figa <tfiga@chromium.org>
Cc: "Haixia Shi" <hshi@chromium.org>,
"Ørjan Eide" <orjan.eide@arm.com>,
"Zain Wang" <wzz@rock-chips.com>,
"Yakir Yang" <ykk@rock-chips.com>,
"Lin Huang" <hl@rock-chips.com>,
"Douglas Anderson" <dianders@chromium.org>,
"Mark Yao" <mark.yao@rock-chips.com>,
linux-kernel@vger.kernel.org, linux-rockchip@lists.infradead.org,
dri-devel@lists.freedesktop.org
Subject: [PATCH v2 22/43] drm/bridge: analogix_dp: Check dpcd write/read status
Date: Fri, 26 Jan 2018 14:16:49 +0100 [thread overview]
Message-ID: <20180126131710.7622-23-thierry.escande@collabora.com> (raw)
In-Reply-To: <20180126131710.7622-1-thierry.escande@collabora.com>
From: Lin Huang <hl@rock-chips.com>
We need to check the dpcd write/read return value to see whether the
write/read was successful
Cc: Kristian H. Kristensen <hoegsberg@chromium.org>
Signed-off-by: Lin Huang <hl@rock-chips.com>
Signed-off-by: zain wang <wzz@rock-chips.com>
Signed-off-by: Douglas Anderson <dianders@chromium.org>
Signed-off-by: Sean Paul <seanpaul@chromium.org>
Signed-off-by: Thierry Escande <thierry.escande@collabora.com>
Reviewed-by: Andrzej Hajda <a.hajda@samsung.com>
---
drivers/gpu/drm/bridge/analogix/analogix_dp_core.c | 181 +++++++++++++++------
1 file changed, 132 insertions(+), 49 deletions(-)
diff --git a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c
index 846574d0dcb0..501f7b4a23d6 100644
--- a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c
+++ b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c
@@ -160,80 +160,135 @@ int analogix_dp_disable_psr(struct analogix_dp_device *dp)
}
EXPORT_SYMBOL_GPL(analogix_dp_disable_psr);
-static bool analogix_dp_detect_sink_psr(struct analogix_dp_device *dp)
+static int analogix_dp_detect_sink_psr(struct analogix_dp_device *dp)
{
unsigned char psr_version;
+ int ret;
+
+ ret = drm_dp_dpcd_readb(&dp->aux, DP_PSR_SUPPORT, &psr_version);
+ if (ret != 1) {
+ dev_err(dp->dev, "failed to get PSR version, disable it\n");
+ return ret;
+ }
- drm_dp_dpcd_readb(&dp->aux, DP_PSR_SUPPORT, &psr_version);
dev_dbg(dp->dev, "Panel PSR version : %x\n", psr_version);
- return (psr_version & DP_PSR_IS_SUPPORTED) ? true : false;
+ dp->psr_enable = (psr_version & DP_PSR_IS_SUPPORTED) ? true : false;
+
+ return 0;
}
-static void analogix_dp_enable_sink_psr(struct analogix_dp_device *dp)
+static int analogix_dp_enable_sink_psr(struct analogix_dp_device *dp)
{
unsigned char psr_en;
+ int ret;
/* Disable psr function */
- drm_dp_dpcd_readb(&dp->aux, DP_PSR_EN_CFG, &psr_en);
+ ret = drm_dp_dpcd_readb(&dp->aux, DP_PSR_EN_CFG, &psr_en);
+ if (ret != 1) {
+ dev_err(dp->dev, "failed to get psr config\n");
+ goto end;
+ }
+
psr_en &= ~DP_PSR_ENABLE;
- drm_dp_dpcd_writeb(&dp->aux, DP_PSR_EN_CFG, psr_en);
+ ret = drm_dp_dpcd_writeb(&dp->aux, DP_PSR_EN_CFG, psr_en);
+ if (ret != 1) {
+ dev_err(dp->dev, "failed to disable panel psr\n");
+ goto end;
+ }
/* Main-Link transmitter remains active during PSR active states */
psr_en = DP_PSR_MAIN_LINK_ACTIVE | DP_PSR_CRC_VERIFICATION;
- drm_dp_dpcd_writeb(&dp->aux, DP_PSR_EN_CFG, psr_en);
+ ret = drm_dp_dpcd_writeb(&dp->aux, DP_PSR_EN_CFG, psr_en);
+ if (ret != 1) {
+ dev_err(dp->dev, "failed to set panel psr\n");
+ goto end;
+ }
/* Enable psr function */
psr_en = DP_PSR_ENABLE | DP_PSR_MAIN_LINK_ACTIVE |
DP_PSR_CRC_VERIFICATION;
- drm_dp_dpcd_writeb(&dp->aux, DP_PSR_EN_CFG, psr_en);
+ ret = drm_dp_dpcd_writeb(&dp->aux, DP_PSR_EN_CFG, psr_en);
+ if (ret != 1) {
+ dev_err(dp->dev, "failed to set panel psr\n");
+ goto end;
+ }
analogix_dp_enable_psr_crc(dp);
+
+ return 0;
+end:
+ dev_err(dp->dev, "enable psr fail, force to disable psr\n");
+ dp->psr_enable = false;
+
+ return ret;
}
-static void
+static int
analogix_dp_enable_rx_to_enhanced_mode(struct analogix_dp_device *dp,
bool enable)
{
u8 data;
+ int ret;
- drm_dp_dpcd_readb(&dp->aux, DP_LANE_COUNT_SET, &data);
+ ret = drm_dp_dpcd_readb(&dp->aux, DP_LANE_COUNT_SET, &data);
+ if (ret < 0)
+ return ret;
if (enable)
- drm_dp_dpcd_writeb(&dp->aux, DP_LANE_COUNT_SET,
- DP_LANE_COUNT_ENHANCED_FRAME_EN |
- DPCD_LANE_COUNT_SET(data));
+ ret = drm_dp_dpcd_writeb(&dp->aux, DP_LANE_COUNT_SET,
+ DP_LANE_COUNT_ENHANCED_FRAME_EN |
+ DPCD_LANE_COUNT_SET(data));
else
- drm_dp_dpcd_writeb(&dp->aux, DP_LANE_COUNT_SET,
- DPCD_LANE_COUNT_SET(data));
+ ret = drm_dp_dpcd_writeb(&dp->aux, DP_LANE_COUNT_SET,
+ DPCD_LANE_COUNT_SET(data));
+
+ return ret < 0 ? ret : 0;
}
-static int analogix_dp_is_enhanced_mode_available(struct analogix_dp_device *dp)
+static int analogix_dp_is_enhanced_mode_available(struct analogix_dp_device *dp,
+ u8 *enhanced_mode_support)
{
u8 data;
- int retval;
+ int ret;
- drm_dp_dpcd_readb(&dp->aux, DP_MAX_LANE_COUNT, &data);
- retval = DPCD_ENHANCED_FRAME_CAP(data);
+ ret = drm_dp_dpcd_readb(&dp->aux, DP_MAX_LANE_COUNT, &data);
+ if (ret < 0)
+ return ret;
- return retval;
+ *enhanced_mode_support = DPCD_ENHANCED_FRAME_CAP(data);
+
+ return 0;
}
-static void analogix_dp_set_enhanced_mode(struct analogix_dp_device *dp)
+static int analogix_dp_set_enhanced_mode(struct analogix_dp_device *dp)
{
u8 data;
+ int ret;
+
+ ret = analogix_dp_is_enhanced_mode_available(dp, &data);
+ if (ret < 0)
+ return ret;
+
+ ret = analogix_dp_enable_rx_to_enhanced_mode(dp, data);
+ if (ret < 0)
+ return ret;
- data = analogix_dp_is_enhanced_mode_available(dp);
- analogix_dp_enable_rx_to_enhanced_mode(dp, data);
analogix_dp_enable_enhanced_mode(dp, data);
+
+ return 0;
}
-static void analogix_dp_training_pattern_dis(struct analogix_dp_device *dp)
+static int analogix_dp_training_pattern_dis(struct analogix_dp_device *dp)
{
+ int retval;
+
analogix_dp_set_training_pattern(dp, DP_NONE);
- drm_dp_dpcd_writeb(&dp->aux, DP_TRAINING_PATTERN_SET,
- DP_TRAINING_PATTERN_DISABLE);
+ retval = drm_dp_dpcd_writeb(&dp->aux, DP_TRAINING_PATTERN_SET,
+ DP_TRAINING_PATTERN_DISABLE);
+
+ return retval < 0 ? retval : 0;
}
static void
@@ -282,7 +337,11 @@ static int analogix_dp_link_start(struct analogix_dp_device *dp)
if (retval < 0)
return retval;
/* set enhanced mode if available */
- analogix_dp_set_enhanced_mode(dp);
+ retval = analogix_dp_set_enhanced_mode(dp);
+ if (retval < 0) {
+ dev_err(dp->dev, "failed to set enhance mode\n");
+ return retval;
+ }
/* Set TX pre-emphasis to minimum */
for (lane = 0; lane < lane_count; lane++)
@@ -567,10 +626,11 @@ static int analogix_dp_process_equalizer_training(struct analogix_dp_device *dp)
if (!analogix_dp_channel_eq_ok(link_status, link_align, lane_count)) {
/* traing pattern Set to Normal */
- analogix_dp_training_pattern_dis(dp);
+ retval = analogix_dp_training_pattern_dis(dp);
+ if (retval < 0)
+ return retval;
dev_info(dp->dev, "Link Training success!\n");
-
analogix_dp_get_link_bandwidth(dp, ®);
dp->link_train.link_rate = reg;
dev_dbg(dp->dev, "final bandwidth = %.2x\n",
@@ -807,7 +867,6 @@ static int analogix_dp_train_link(struct analogix_dp_device *dp)
static int analogix_dp_config_video(struct analogix_dp_device *dp)
{
- int retval = 0;
int timeout_loop = 0;
int done_count = 0;
@@ -825,8 +884,9 @@ static int analogix_dp_config_video(struct analogix_dp_device *dp)
if (analogix_dp_is_slave_video_stream_clock_on(dp) == 0)
break;
if (timeout_loop > DP_TIMEOUT_LOOP_COUNT) {
- dev_err(dp->dev, "Timeout of slave video streamclk ok\n");
- return -ETIMEDOUT;
+ dev_warn(dp->dev,
+ "Ignoring timeout of slave video streamclk ok\n");
+ break;
}
usleep_range(1000, 1001);
}
@@ -865,30 +925,38 @@ static int analogix_dp_config_video(struct analogix_dp_device *dp)
usleep_range(1000, 1001);
}
- if (retval != 0)
- dev_err(dp->dev, "Video stream is not detected!\n");
-
- return retval;
+ return 0;
}
-static void analogix_dp_enable_scramble(struct analogix_dp_device *dp,
- bool enable)
+static int analogix_dp_enable_scramble(struct analogix_dp_device *dp,
+ bool enable)
{
u8 data;
+ int ret;
if (enable) {
analogix_dp_enable_scrambling(dp);
- drm_dp_dpcd_readb(&dp->aux, DP_TRAINING_PATTERN_SET, &data);
- drm_dp_dpcd_writeb(&dp->aux, DP_TRAINING_PATTERN_SET,
+ ret = drm_dp_dpcd_readb(&dp->aux, DP_TRAINING_PATTERN_SET,
+ &data);
+ if (ret != 1)
+ return ret;
+
+ ret = drm_dp_dpcd_writeb(&dp->aux, DP_TRAINING_PATTERN_SET,
(u8)(data & ~DP_LINK_SCRAMBLING_DISABLE));
} else {
analogix_dp_disable_scrambling(dp);
- drm_dp_dpcd_readb(&dp->aux, DP_TRAINING_PATTERN_SET, &data);
- drm_dp_dpcd_writeb(&dp->aux, DP_TRAINING_PATTERN_SET,
+ ret = drm_dp_dpcd_readb(&dp->aux, DP_TRAINING_PATTERN_SET,
+ &data);
+ if (ret != 1)
+ return ret;
+
+ ret = drm_dp_dpcd_writeb(&dp->aux, DP_TRAINING_PATTERN_SET,
(u8)(data | DP_LINK_SCRAMBLING_DISABLE));
}
+
+ return ret < 0 ? ret : 0;
}
static irqreturn_t analogix_dp_hardirq(int irq, void *arg)
@@ -943,23 +1011,36 @@ static int analogix_dp_commit(struct analogix_dp_device *dp)
return ret;
}
- analogix_dp_enable_scramble(dp, 1);
+ ret = analogix_dp_enable_scramble(dp, 1);
+ if (ret < 0) {
+ dev_err(dp->dev, "can not enable scramble\n");
+ return ret;
+ }
analogix_dp_init_video(dp);
ret = analogix_dp_config_video(dp);
- if (ret)
+ if (ret) {
dev_err(dp->dev, "unable to config video\n");
+ return ret;
+ }
/* Safe to enable the panel now */
if (dp->plat_data->panel) {
- if (drm_panel_enable(dp->plat_data->panel))
+ ret = drm_panel_enable(dp->plat_data->panel);
+ if (ret) {
DRM_ERROR("failed to enable the panel\n");
+ return ret;
+ }
}
- dp->psr_enable = analogix_dp_detect_sink_psr(dp);
+ ret = analogix_dp_detect_sink_psr(dp);
+ if (ret)
+ return ret;
+
if (dp->psr_enable)
- analogix_dp_enable_sink_psr(dp);
- return 0;
+ ret = analogix_dp_enable_sink_psr(dp);
+
+ return ret;
}
/*
@@ -1186,8 +1267,10 @@ static int analogix_dp_set_bridge(struct analogix_dp_device *dp)
}
ret = analogix_dp_commit(dp);
- if (ret)
+ if (ret) {
+ DRM_ERROR("dp commit error, ret = %d\n", ret);
goto out_dp_init;
+ }
enable_irq(dp->irq);
return 0;
--
2.14.1
next prev parent reply other threads:[~2018-01-26 13:17 UTC|newest]
Thread overview: 58+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-01-26 13:16 [PATCH v2 00/43] DRM Rockchip rk3399 (Kevin) Thierry Escande
2018-01-26 13:16 ` [PATCH v2 01/43] drm/rockchip: Get rid of unnecessary struct fields Thierry Escande
2018-01-29 20:44 ` Sean Paul
2018-01-30 2:21 ` Sandy Huang
2018-01-26 13:16 ` [PATCH v2 02/43] drm/rockchip: support prime import sg table Thierry Escande
2018-01-30 2:40 ` Sandy Huang
2018-01-26 13:16 ` [PATCH v2 03/43] drm/rockchip: Respect page offset for PRIME mmap calls Thierry Escande
2018-01-30 2:42 ` Sandy Huang
2018-01-26 13:16 ` [PATCH v2 04/43] drm/bridge: analogix_dp: set psr activate/deactivate when enable/disable bridge Thierry Escande
2018-01-26 13:16 ` [PATCH v2 05/43] drm/bridge: analogix_dp: Don't power bridge in analogix_dp_bind Thierry Escande
2018-01-26 13:16 ` [PATCH v2 06/43] drm/rockchip: Don't use atomic constructs for psr Thierry Escande
2018-01-26 13:16 ` [PATCH v2 07/43] drm/bridge: analogix_dp: detect Sink PSR state after configuring the PSR Thierry Escande
2018-01-26 13:16 ` [PATCH v2 08/43] drm/rockchip: Remove analogix psr worker Thierry Escande
2018-01-26 13:16 ` [PATCH v2 09/43] drm/bridge: analogix_dp: Don't change psr while bridge is disabled Thierry Escande
2018-01-26 13:16 ` [PATCH v2 10/43] drm/rockchip: add mutex vop lock Thierry Escande
2018-01-30 2:55 ` Sandy Huang
2018-01-26 13:16 ` [PATCH v2 11/43] drm/bridge: analogix_dp: add fast link train for eDP Thierry Escande
2018-01-26 13:16 ` [PATCH v2 12/43] drm/rockchip: Only wait for panel ACK on PSR entry Thierry Escande
2018-01-26 13:16 ` [PATCH v2 13/43] drm/bridge: analogix_dp: Move enable video into config_video() Thierry Escande
2018-01-26 13:16 ` [PATCH v2 14/43] drm/bridge: analogix_dp: Check AUX_EN status when doing AUX transfer Thierry Escande
2018-01-26 13:16 ` [PATCH v2 15/43] drm/bridge: analogix_dp: Don't use fast link training when panel just powered up Thierry Escande
2018-01-26 13:16 ` [PATCH v2 16/43] drm/bridge: analogix_dp: Retry bridge enable when it failed Thierry Escande
2018-01-26 13:16 ` [PATCH v2 17/43] drm/bridge: analogix_dp: Wait for HPD signal before configuring link Thierry Escande
2018-01-26 13:16 ` [PATCH v2 18/43] drm/bridge: analogix_dp: Set PD_INC_BG first when powering up edp phy Thierry Escande
2018-01-26 13:16 ` [PATCH v2 19/43] drm/bridge: analogix_dp: Ensure edp is disabled when shutting down the panel Thierry Escande
2018-01-26 13:16 ` [PATCH v2 20/43] drm/bridge: analogix_dp: Extend hpd check time to 100ms Thierry Escande
2018-01-29 21:02 ` Sean Paul
2018-01-26 13:16 ` [PATCH v2 21/43] drm/bridge: analogix_dp: Fix incorrect usage of enhanced mode Thierry Escande
2018-01-26 13:16 ` Thierry Escande [this message]
2018-01-29 21:14 ` [PATCH v2 22/43] drm/bridge: analogix_dp: Check dpcd write/read status Sean Paul
2018-01-29 21:31 ` Sean Paul
2018-01-26 13:16 ` [PATCH v2 23/43] drm/bridge: analogix_dp: Fix AUX_PD bit for Rockchip Thierry Escande
2018-01-26 13:16 ` [PATCH v2 24/43] drm/bridge: analogix_dp: Reset aux channel if an error occurred Thierry Escande
2018-01-29 21:27 ` Sean Paul
2018-01-26 13:16 ` [PATCH v2 25/43] drm/rockchip: Restore psr->state when enable/disable psr failed Thierry Escande
2018-01-26 13:16 ` [PATCH v2 26/43] drm/bridge: analogix_dp: Don't use ANALOGIX_DP_PLL_CTL to control pll Thierry Escande
2018-01-26 13:16 ` [PATCH v2 27/43] drm/bridge: analogix_dp: Fix timeout of video streamclk config Thierry Escande
2018-01-26 13:16 ` [PATCH v2 28/43] drm/bridge: analogix_dp: Fix incorrect operations with register ANALOGIX_DP_FUNC_EN_1 Thierry Escande
2018-01-29 21:35 ` Sean Paul
2018-01-26 13:16 ` [PATCH v2 29/43] drm/bridge: analogix_dp: Move fast link training detect to set_bridge Thierry Escande
2018-01-29 21:38 ` Sean Paul
2018-01-26 13:16 ` [PATCH v2 30/43] drm/bridge: analogix_dp: Reorder plat_data->power_off to happen sooner Thierry Escande
2018-01-26 13:16 ` [PATCH v2 31/43] drm/bridge: analogix_dp: Properly log AUX CH errors Thierry Escande
2018-01-26 13:16 ` [PATCH v2 32/43] drm/bridge: analogix_dp: Properly disable aux chan retries on rockchip Thierry Escande
2018-01-26 13:17 ` [PATCH v2 33/43] drm/panel: simple: Change mode for Sharp lq123p1jx31 Thierry Escande
2018-01-26 13:17 ` [PATCH v2 34/43] drm/rockchip: pre dither down when output bpc is 8bit Thierry Escande
2018-01-26 13:17 ` [PATCH v2 35/43] drm/bridge: analogix_dp: Split the platform-specific poweron in two parts Thierry Escande
2018-01-26 13:17 ` [PATCH v2 36/43] drm/rockchip: analogix_dp: Do not call Analogix code before bind Thierry Escande
2018-01-26 13:17 ` [PATCH v2 37/43] drm/rockchip: Disable PSR on input events Thierry Escande
2018-01-29 21:44 ` Sean Paul
2018-01-26 13:17 ` [PATCH v2 38/43] drm/rockchip: Cancel PSR enable work before changing the state Thierry Escande
2018-01-26 13:17 ` [PATCH v2 39/43] drm/rockchip: psr: Avoid redundant calls to .set() callback Thierry Escande
2018-01-26 13:17 ` [PATCH v2 40/43] drm/rockchip: psr: Sanitize semantics of allow/disallow API Thierry Escande
2018-01-26 13:17 ` [PATCH v2 41/43] drm/rockchip: Disable PSR from reboot notifier Thierry Escande
2018-01-26 13:17 ` [PATCH v2 42/43] drm/rockchip: Disallow PSR for the whole atomic commit Thierry Escande
2018-01-26 13:17 ` [PATCH v2 43/43] drm/rockchip: psr: Remove flush by CRTC Thierry Escande
2018-01-28 0:41 ` [PATCH v2 00/43] DRM Rockchip rk3399 (Kevin) Emil Renner Berthing
2018-01-29 21:51 ` Sean Paul
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