From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752936AbeAZNuX (ORCPT ); Fri, 26 Jan 2018 08:50:23 -0500 Received: from usa-sjc-mx-foss1.foss.arm.com ([217.140.101.70]:47414 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752909AbeAZNuT (ORCPT ); Fri, 26 Jan 2018 08:50:19 -0500 Date: Fri, 26 Jan 2018 13:50:13 +0000 From: Dave Martin To: Suzuki K Poulose Cc: linux-arm-kernel@lists.infradead.org, mark.rutland@arm.com, ckadabi@codeaurora.org, ard.biesheuvel@linaro.org, marc.zyngier@arm.com, catalin.marinas@arm.com, will.deacon@arm.com, linux-kernel@vger.kernel.org, jnair@caviumnetworks.com Subject: Re: [PATCH 11/16] arm64: errata: Clean up midr range helpers Message-ID: <20180126135013.GS5862@e103592.cambridge.arm.com> References: <20180123122809.16269-1-suzuki.poulose@arm.com> <20180123122809.16269-12-suzuki.poulose@arm.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20180123122809.16269-12-suzuki.poulose@arm.com> User-Agent: Mutt/1.5.23 (2014-03-12) Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Tue, Jan 23, 2018 at 12:28:04PM +0000, Suzuki K Poulose wrote: > We are about to introduce generic MIDR range helpers. Clean > up the existing helpers in errat handling, preparing them errata/erratum > to use generic version. > > Signed-off-by: Suzuki K Poulose > --- > arch/arm64/kernel/cpu_errata.c | 76 +++++++++++++++++++++++------------------- > 1 file changed, 41 insertions(+), 35 deletions(-) > > diff --git a/arch/arm64/kernel/cpu_errata.c b/arch/arm64/kernel/cpu_errata.c > index 550ac8a0854b..054b17009f41 100644 > --- a/arch/arm64/kernel/cpu_errata.c > +++ b/arch/arm64/kernel/cpu_errata.c > @@ -179,14 +179,23 @@ static int qcom_enable_link_stack_sanitization( > } > #endif /* CONFIG_HARDEN_BRANCH_PREDICTOR */ > > -#define MIDR_RANGE(model, min, max) \ > +#define ERRATA_MIDR_RANGE(model, v_min, r_min, v_max, r_max) \ > .type = ARM64_CPUCAP_STRICT_CPU_LOCAL_ERRATUM, \ > .matches = is_affected_midr_range, \ > .midr_model = model, \ > - .midr_range_min = min, \ > - .midr_range_max = max > + .midr_range_min = MIDR_CPU_VAR_REV(v_min, r_min), \ > + .midr_range_max = MIDR_CPU_VAR_REV(v_max, r_max) > > -#define MIDR_ALL_VERSIONS(model) \ > +/* Errata affecting a range of revisions of given model variant */ > +#define ERRATA_MIDR_REV_RANGE(m, var, r_min, r_max) \ > + ERRATA_MIDR_RANGE(m, var, r_min, var, r_max) > + > +/* Errata affecting a single variant/revision of a model */ > +#define ERRATA_MIDR(model, var, rev) \ Maybe call this ERRATA_MIDR_REV() since it's similar to ERRATA_MIDR_REV_RANGE() but describes a single revision? [...] Cheers ---Dave