From mboxrd@z Thu Jan  1 00:00:00 1970
Return-Path: <yong.deng@magewell.com>
X-Google-Smtp-Source: AH8x227nVlPVjtX6fOKq6TpRu5osf6Sy4PiLWwh+UOTI+XL47a7iWwkx/ppqqIRkV0Gy6E4XJXxN
ARC-Seal: i=1; a=rsa-sha256; t=1517107206; cv=none;
        d=google.com; s=arc-20160816;
        b=QdSRaZ2Nn5SoenkVL5YbRW8Y79dV1Pau8fkP8mgA3Unfb3gXDa4x89rx8r16I+vjIT
         Xoc1DP85nle7t14HAEBW1vwNHlU51GyCc+tWivVhIgcR/BoDxrVjaSFfKk8FletUHoVr
         qnOt5MTPNB1NE/yxv5If65uzdOP1tN4KWX7yw5B8PlpzF2wNl807POYzsjzZM4POznFv
         FVUioQJpmbuW4OS11hbGP3YGfgCfB9MhcnBlJJnP7YnMa9/kcxN3YAMObw4TTOUFx7v7
         0glG5G1uFaPg2cffyxzP9ssAM8EyzYBsQ6Ow1PsdvsFZeSgzVZebyVwyhrIxB0Umu57c
         KTbg==
ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816;
        h=content-transfer-encoding:mime-version:references:in-reply-to
         :message-id:subject:cc:to:from:date:arc-authentication-results;
        bh=1wq1v/C3dmsaitpCFhB9XSzRoLopPBwCTkjabKOpZa8=;
        b=E7/sSqGihGPVfxdYFd8oL7p16vE8Tu27d3uoaRouQ++3+Dn1RzsHzxnKO7nomSi8+h
         XanLgEuZnU0zRzVoDSNtmFvTd0SMolvbmEn7hrllEfiIQyOTAd8/pqU+VrBdsirlcr9n
         D8qpBpYn1oo+AyyNXEr+UbAPDtV92upg4XBl+XBZawDLF9PNwns6BpnthzrARJv4OU8L
         KxJG0eD+OZd0wL8hlSt9uqltUnQ3Z38Q0XnmrypUbrvtp0nS4zVE6C/NxydikqvR3bp1
         xVe7HE+IjgUNeEeFXaXrkvzZu2KtOQCP3qwA1acdlhDnd4Lbsvfxi3TfE6ysXV1inOyf
         VJAQ==
ARC-Authentication-Results: i=1; mx.google.com;
       spf=pass (google.com: domain of yong.deng@magewell.com designates 115.124.20.27 as permitted sender) smtp.mailfrom=yong.deng@magewell.com
Authentication-Results: mx.google.com;
       spf=pass (google.com: domain of yong.deng@magewell.com designates 115.124.20.27 as permitted sender) smtp.mailfrom=yong.deng@magewell.com
X-Alimail-AntiSpam: AC=CONTINUE;BC=0.08642541|-1;CH=green;FP=0|0|0|0|0|-1|-1|-1;HT=e01l07440;MF=yong.deng@magewell.com;NM=1;PH=DS;RN=25;RT=25;SR=0;TI=SMTPD_---.AZwoDTe_1517107191;
Date: Sun, 28 Jan 2018 10:39:29 +0800
From: Yong <yong.deng@magewell.com>
To: Linus Walleij <linus.walleij@linaro.org>
Cc: Maxime Ripard <maxime.ripard@free-electrons.com>, Mauro Carvalho Chehab
 <mchehab@kernel.org>, Rob Herring <robh+dt@kernel.org>, Mark Rutland
 <mark.rutland@arm.com>, Chen-Yu Tsai <wens@csie.org>, "David S. Miller"
 <davem@davemloft.net>, Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
 Hans Verkuil <hans.verkuil@cisco.com>, Randy Dunlap
 <rdunlap@infradead.org>, Stanimir Varbanov <stanimir.varbanov@linaro.org>,
 Hugues Fruchet <hugues.fruchet@st.com>, Yannick Fertre
 <yannick.fertre@st.com>, Philipp Zabel <p.zabel@pengutronix.de>, Arnd
 Bergmann <arnd@arndb.de>, Benjamin Gaignard <benjamin.gaignard@linaro.org>,
 Ramesh Shanmugasundaram <ramesh.shanmugasundaram@bp.renesas.com>, Sakari
 Ailus <sakari.ailus@linux.intel.com>, Rick Chang <rick.chang@mediatek.com>,
 linux-media@vger.kernel.org,
 "open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS"
 <devicetree@vger.kernel.org>, Linux ARM
 <linux-arm-kernel@lists.infradead.org>, "linux-kernel@vger.kernel.org"
 <linux-kernel@vger.kernel.org>, linux-sunxi <linux-sunxi@googlegroups.com>,
 megous@megous.com
Subject: Re: [PATCH v6 2/2] media: V3s: Add support for Allwinner CSI.
Message-Id: <20180128103929.421eb809821f101ee1c6cb60@magewell.com>
In-Reply-To: <CACRpkdan52UB7HOyH1gnHWg4CDke_VQxAdq8cBgwUroibE59Ow@mail.gmail.com>
References: <1516695531-23349-1-git-send-email-yong.deng@magewell.com>
	<CACRpkdan52UB7HOyH1gnHWg4CDke_VQxAdq8cBgwUroibE59Ow@mail.gmail.com>
X-Mailer: Sylpheed 3.6.0 (GTK+ 2.24.30; i686-pc-mingw32)
Mime-Version: 1.0
Content-Type: text/plain; charset=US-ASCII
Content-Transfer-Encoding: 7bit
X-getmail-retrieved-from-mailbox: INBOX
X-GMAIL-THRID: =?utf-8?q?1590370608168306586?=
X-GMAIL-MSGID: =?utf-8?q?1590802205848653453?=
X-Mailing-List: linux-kernel@vger.kernel.org
List-ID: <linux-kernel.vger.kernel.org>

Hi,

On Sat, 27 Jan 2018 17:14:26 +0100
Linus Walleij <linus.walleij@linaro.org> wrote:

> On Tue, Jan 23, 2018 at 9:18 AM, Yong Deng <yong.deng@magewell.com> wrote:
> 
> > Allwinner V3s SoC features two CSI module. CSI0 is used for MIPI CSI-2
> > interface and CSI1 is used for parallel interface. This is not
> > documented in datasheet but by test and guess.
> >
> > This patch implement a v4l2 framework driver for it.
> >
> > Currently, the driver only support the parallel interface. MIPI-CSI2,
> > ISP's support are not included in this patch.
> >
> > Tested-by: Maxime Ripard <maxime.ripard@free-electrons.com>
> > Signed-off-by: Yong Deng <yong.deng@magewell.com>
> 
> This is cool stuff :)
> 
> > +void sun6i_csi_update_buf_addr(struct sun6i_csi *csi, dma_addr_t addr)
> > +{
> > +       struct sun6i_csi_dev *sdev = sun6i_csi_to_dev(csi);
> > +       /* transform physical address to bus address */
> > +       dma_addr_t bus_addr = addr - PHYS_OFFSET;
> 
> I am sorry if this is an unjustified drive-by comment. Maybe you
> have already investigate other ways to do this.
> 
> Accessing PHYS_OFFSET directly seems unintuitive
> and not good practice.
> 
> But normally an dma_addr_t only comes from some
> function inside <linux/dma-mapping.h> such as:
> dma_alloc_coherent() for a contigous buffer which is coherent
> in physical memory, or from some buffer <= 64KB that
> is switching ownership between device and CPU explicitly
> with dma_map* or so. Did you check with
> Documentation/DMA-API.txt?

The dma_addr_t here comes from v4l2 vb2 and it's already 'mapped'.

Maybe the dma-mapping code of sunXi does not do conversion between 
device and CPU. I'm not familiar with this. 

Maxime, do you have any idea about this?
Can we get bus address directly from dma_alloc_coherent or dma_map*
at the system layer but not doing the conversion per driver?

Yong