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Sun, 28 Jan 2018 17:55:38 -0500 Received: from mail-dm3nam03on0095.outbound.protection.outlook.com ([104.47.41.95]:55532 "EHLO NAM03-DM3-obe.outbound.protection.outlook.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S932117AbeA1W22 (ORCPT ); Sun, 28 Jan 2018 17:28:28 -0500 From: Sasha Levin To: "linux-kernel@vger.kernel.org" , "stable@vger.kernel.org" CC: Andre Przywara , Linus Walleij , Sasha Levin Subject: [PATCH AUTOSEL for 4.9 12/49] pinctrl: sunxi: Fix A80 interrupt pin bank Thread-Topic: [PATCH AUTOSEL for 4.9 12/49] pinctrl: sunxi: Fix A80 interrupt pin bank Thread-Index: AQHTmIc326HrKLDcB0COu9pH7zW2kg== Date: Sun, 28 Jan 2018 22:27:43 +0000 Message-ID: <20180128222727.22404-12-alexander.levin@microsoft.com> References: <20180128222727.22404-1-alexander.levin@microsoft.com> In-Reply-To: <20180128222727.22404-1-alexander.levin@microsoft.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-originating-ip: [52.168.54.252] x-ms-publictraffictype: Email x-microsoft-exchange-diagnostics: 1;MW2PR2101MB1097;7:s+tPFbEIdPdNmchGcRFcLatr0h7XeQIKMgwCysarmZYP7fWULqQlOQ4cOYRzhpeoE7yVsnTULuBbDZvo0vCdt7dW5XW8o88aXceogMuTbMxjXrVmvoPwKC+kDTSZhUekjf+Aeny91cqBkCIW72CU94wrWpZ7LNlIKdl21yQAf1PWcqXAi0U3baOF4GSQ9Iad/G5M1k2Am90RMlb3/jY+uxIXXLiz/5HbfYoKB33IlXlbB8kpqVWXOamHOiWbxUrt x-ms-office365-filtering-ht: Tenant x-ms-office365-filtering-correlation-id: aa1f258c-d9e8-421c-b7bd-08d5669e7281 x-microsoft-antispam: UriScan:;BCL:0;PCL:0;RULEID:(7020095)(4652020)(4534165)(4627221)(201703031133081)(201702281549075)(48565401081)(5600026)(4604075)(3008032)(2017052603307)(7193020);SRVR:MW2PR2101MB1097; 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x-microsoft-antispam-message-info: 4uibYPSEiCNgbs0VOy1bKKhs7vKBhCqt0PUu8/vZSSTdlUl/gbWurProuuf1GelFXTDgNrbShZ71JdGlX635iw== spamdiagnosticoutput: 1:99 spamdiagnosticmetadata: NSPM Content-Type: text/plain; charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: microsoft.com X-MS-Exchange-CrossTenant-Network-Message-Id: aa1f258c-d9e8-421c-b7bd-08d5669e7281 X-MS-Exchange-CrossTenant-originalarrivaltime: 28 Jan 2018 22:27:43.6165 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 72f988bf-86f1-41af-91ab-2d7cd011db47 X-MS-Exchange-Transport-CrossTenantHeadersStamped: MW2PR2101MB1097 Sender: stable-owner@vger.kernel.org X-Mailing-List: stable@vger.kernel.org X-getmail-retrieved-from-mailbox: INBOX X-Mailing-List: linux-kernel@vger.kernel.org List-ID: From: Andre Przywara [ Upstream commit 6ad4cc8d1ac483e0fd33f605fb2788b0ecf51ed4 ] On the A80 the pins on port B can trigger interrupts, and those are assigned to the second interrupt bank. Having two pins assigned to the same interrupt bank/pin combination does not look healthy (instead more like a copy&paste bug from pins PA14-PA16), so fix the interrupt bank for pins PB14-PB16, which is actually 1. I don't have any A80 board, so could not test this. Fixes: d5e9fb31baa2 ("pinctrl: sunxi: Add A80 pinctrl muxing options") Signed-off-by: Andre Przywara Acked-by: Chen-Yu Tsai Signed-off-by: Linus Walleij Signed-off-by: Sasha Levin --- drivers/pinctrl/sunxi/pinctrl-sun9i-a80.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/pinctrl/sunxi/pinctrl-sun9i-a80.c b/drivers/pinctrl/su= nxi/pinctrl-sun9i-a80.c index 1b580ba76453..907d7db3fcee 100644 --- a/drivers/pinctrl/sunxi/pinctrl-sun9i-a80.c +++ b/drivers/pinctrl/sunxi/pinctrl-sun9i-a80.c @@ -145,19 +145,19 @@ static const struct sunxi_desc_pin sun9i_a80_pins[] = =3D { SUNXI_FUNCTION(0x0, "gpio_in"), SUNXI_FUNCTION(0x1, "gpio_out"), SUNXI_FUNCTION(0x3, "mcsi"), /* MCLK */ - SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 14)), /* PB_EINT14 */ + SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 14)), /* PB_EINT14 */ SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 15), SUNXI_FUNCTION(0x0, "gpio_in"), SUNXI_FUNCTION(0x1, "gpio_out"), SUNXI_FUNCTION(0x3, "mcsi"), /* SCK */ SUNXI_FUNCTION(0x4, "i2c4"), /* SCK */ - SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 15)), /* PB_EINT15 */ + SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 15)), /* PB_EINT15 */ SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 16), SUNXI_FUNCTION(0x0, "gpio_in"), SUNXI_FUNCTION(0x1, "gpio_out"), SUNXI_FUNCTION(0x3, "mcsi"), /* SDA */ SUNXI_FUNCTION(0x4, "i2c4"), /* SDA */ - SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 16)), /* PB_EINT16 */ + SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 16)), /* PB_EINT16 */ =20 /* Hole */ SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 0), --=20 2.11.0