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Sun, 28 Jan 2018 17:56:28 -0500 Received: from mail-dm3nam03on0095.outbound.protection.outlook.com ([104.47.41.95]:55532 "EHLO NAM03-DM3-obe.outbound.protection.outlook.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S932096AbeA1W21 (ORCPT ); Sun, 28 Jan 2018 17:28:27 -0500 From: Sasha Levin To: "linux-kernel@vger.kernel.org" , "stable@vger.kernel.org" CC: Andre Przywara , Linus Walleij , Sasha Levin Subject: [PATCH AUTOSEL for 4.9 13/49] pinctrl: sunxi: Fix A64 UART mux value Thread-Topic: [PATCH AUTOSEL for 4.9 13/49] pinctrl: sunxi: Fix A64 UART mux value Thread-Index: AQHTmIc3wg84cgU9pkKgNNsPPfAzEg== Date: Sun, 28 Jan 2018 22:27:44 +0000 Message-ID: <20180128222727.22404-13-alexander.levin@microsoft.com> References: <20180128222727.22404-1-alexander.levin@microsoft.com> In-Reply-To: <20180128222727.22404-1-alexander.levin@microsoft.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-originating-ip: [52.168.54.252] x-ms-publictraffictype: Email x-microsoft-exchange-diagnostics: 1;MW2PR2101MB1097;7:gyfnflkkaX0EkRYOYB0F6FpnSaQgIocjztBNo+eXR8JIJcpdL1v5dpxBdUQAmVifjlOoln6jiR8r1PTpcLNSY1zOxUx4Ob4/PxZCx0V3bjcVqOmAfoHN5Fbe+XYaniKKhVbclY/+QYBLxvfYsDtydLqOken2cE07SGXgA2mWGK8hqHaHrgxY8rmT2zVRRfPt0fXc6X11/iyFFRHjhgG35aAkJVi6ZQVZ67KEZDRWhNJ+yyF3YJGQLLYSIrXRdcx5 x-ms-office365-filtering-ht: Tenant x-ms-office365-filtering-correlation-id: 25139ab1-ac0c-4ee7-eccc-08d5669e72b7 x-microsoft-antispam: UriScan:;BCL:0;PCL:0;RULEID:(7020095)(4652020)(4534165)(4627221)(201703031133081)(201702281549075)(48565401081)(5600026)(4604075)(3008032)(2017052603307)(7193020);SRVR:MW2PR2101MB1097; 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x-microsoft-antispam-message-info: OkJISBHVRa+Ip6auzD7WOOkNnHfFJnORVz7LHICwSCVckXyFs++k2A62KFrpSsVfcTtrsN2TNnpux7EDDWN9eA== spamdiagnosticoutput: 1:99 spamdiagnosticmetadata: NSPM Content-Type: text/plain; charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: microsoft.com X-MS-Exchange-CrossTenant-Network-Message-Id: 25139ab1-ac0c-4ee7-eccc-08d5669e72b7 X-MS-Exchange-CrossTenant-originalarrivaltime: 28 Jan 2018 22:27:44.2650 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 72f988bf-86f1-41af-91ab-2d7cd011db47 X-MS-Exchange-Transport-CrossTenantHeadersStamped: MW2PR2101MB1097 Sender: stable-owner@vger.kernel.org X-Mailing-List: stable@vger.kernel.org X-getmail-retrieved-from-mailbox: INBOX X-Mailing-List: linux-kernel@vger.kernel.org List-ID: From: Andre Przywara [ Upstream commit 7c5c2c2d18d778e51fd8b899965097168306031c ] To use pin PF4 as the RX signal of UART0, we have to write 0b011 into the respective pin controller register. Fix the wrong value we had in our table so far. Fixes: 96851d391d02 ("drivers: pinctrl: add driver for Allwinner A64 SoC") Signed-off-by: Andre Przywara Acked-by: Chen-Yu Tsai Signed-off-by: Linus Walleij Signed-off-by: Sasha Levin --- drivers/pinctrl/sunxi/pinctrl-sun50i-a64.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/pinctrl/sunxi/pinctrl-sun50i-a64.c b/drivers/pinctrl/s= unxi/pinctrl-sun50i-a64.c index 4f2a726bbaeb..f5f77432ce6f 100644 --- a/drivers/pinctrl/sunxi/pinctrl-sun50i-a64.c +++ b/drivers/pinctrl/sunxi/pinctrl-sun50i-a64.c @@ -428,7 +428,7 @@ static const struct sunxi_desc_pin a64_pins[] =3D { SUNXI_FUNCTION(0x0, "gpio_in"), SUNXI_FUNCTION(0x1, "gpio_out"), SUNXI_FUNCTION(0x2, "mmc0"), /* D3 */ - SUNXI_FUNCTION(0x4, "uart0")), /* RX */ + SUNXI_FUNCTION(0x3, "uart0")), /* RX */ SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 5), SUNXI_FUNCTION(0x0, "gpio_in"), SUNXI_FUNCTION(0x1, "gpio_out"), --=20 2.11.0