From: Niklas Cassel <niklas.cassel@axis.com>
To: kishon@ti.com, linux-pci@vger.kernel.org
Cc: Niklas Cassel <niklass@axis.com>, linux-kernel@vger.kernel.org
Subject: [PATCH 0/3] PCI endpoint 64-bit BAR fixes
Date: Thu, 1 Feb 2018 17:11:16 +0100 [thread overview]
Message-ID: <20180201161119.3852-1-niklas.cassel@axis.com> (raw)
PCI endpoint fixes to improve the way 64-bit BARs are handled.
There are still future improvements that could be made:
pci-epf-test.c always allocates space for
6 BARs, even when using 64-bit BARs (which
really only requires us to allocate 3 BARs).
pcitest.sh will print "NOT OKAY" for BAR1,
BAR3, and BAR5 when using 64-bit BARs.
This could probably be improved to say
something like "N/A (64-bit BAR)".
Niklas Cassel (3):
PCI: endpoint: Handle 64-bit BARs properly
misc: pci_endpoint_test: Handle 64-bit BARs properly
PCI: designware-ep: Return an error when requesting a too large BAR
size
drivers/misc/pci_endpoint_test.c | 2 ++
drivers/pci/dwc/pcie-designware-ep.c | 5 +++++
drivers/pci/endpoint/functions/pci-epf-test.c | 2 ++
3 files changed, 9 insertions(+)
--
2.14.2
next reply other threads:[~2018-02-01 16:11 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-02-01 16:11 Niklas Cassel [this message]
2018-02-01 16:11 ` [PATCH 1/3] PCI: endpoint: Handle 64-bit BARs properly Niklas Cassel
2018-02-01 16:11 ` [PATCH 2/3] misc: pci_endpoint_test: " Niklas Cassel
2018-02-01 16:11 ` [PATCH 3/3] PCI: designware-ep: Return an error when requesting a too large BAR size Niklas Cassel
2018-02-01 18:57 ` Andy Shevchenko
2018-02-01 19:00 ` Jingoo Han
2018-02-05 16:25 ` Niklas Cassel
2018-02-06 19:38 ` Andy Shevchenko
2018-02-08 12:33 ` Niklas Cassel
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