From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752904AbeBFM7z (ORCPT ); Tue, 6 Feb 2018 07:59:55 -0500 Received: from lelnx193.ext.ti.com ([198.47.27.77]:55237 "EHLO lelnx193.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753120AbeBFM7c (ORCPT ); Tue, 6 Feb 2018 07:59:32 -0500 From: Kishon Vijay Abraham I To: =?UTF-8?q?Beno=C3=AEt=20Cousson?= , Tony Lindgren , Rob Herring CC: Mark Rutland , Russell King , , , , , Kishon Vijay Abraham I Subject: [PATCH v2 12/15] ARM: dts: dra71-evm: Select pull down for mmc1_clk line in default mode Date: Tue, 6 Feb 2018 18:28:03 +0530 Message-ID: <20180206125806.19350-13-kishon@ti.com> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20180206125806.19350-1-kishon@ti.com> References: <20180206125806.19350-1-kishon@ti.com> MIME-Version: 1.0 Content-Type: text/plain X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org During a short period when the bus voltage is switched from 3.3v to 1.8v, (to enumerate UHS mode), the mmc module is disabled and the mmc IO lines are kept in a state according to the programmed pad mux pull type. According to 4.2.4.2 Timing to Switch Signal Voltage in "SD Specifications Part 1 Physical Layer Specification Version 5.00 February 22, 2016", the host should hold CLK low for at least 5ms. In order to keep the card line low during voltage switch, the pad mux of mmc1_clk line should be configured to pull down. This is specific only to dra71-evm (and not all dra72 based boards) since mmc1_clk line in dra71-evm is not connected to an external pullup. Signed-off-by: Kishon Vijay Abraham I --- arch/arm/boot/dts/dra71-evm.dts | 13 +++++++++++++ 1 file changed, 13 insertions(+) diff --git a/arch/arm/boot/dts/dra71-evm.dts b/arch/arm/boot/dts/dra71-evm.dts index 64363f75c01a..ebc4bbae981e 100644 --- a/arch/arm/boot/dts/dra71-evm.dts +++ b/arch/arm/boot/dts/dra71-evm.dts @@ -50,6 +50,19 @@ }; }; +&dra7_pmx_core { + mmc1_pins_default: mmc1_pins_default { + pinctrl-single,pins = < + DRA7XX_CORE_IOPAD(0x3754, PIN_INPUT_PULLDOWN | MUX_MODE0) /* mmc1_clk.clk */ + DRA7XX_CORE_IOPAD(0x3758, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_cmd.cmd */ + DRA7XX_CORE_IOPAD(0x375c, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat0.dat0 */ + DRA7XX_CORE_IOPAD(0x3760, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat1.dat1 */ + DRA7XX_CORE_IOPAD(0x3764, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat2.dat2 */ + DRA7XX_CORE_IOPAD(0x3768, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat3.dat3 */ + >; + }; +}; + &i2c1 { status = "okay"; clock-frequency = <400000>; -- 2.11.0