From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S934062AbeBMK3D (ORCPT ); Tue, 13 Feb 2018 05:29:03 -0500 Received: from usa-sjc-mx-foss1.foss.arm.com ([217.140.101.70]:55070 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S933995AbeBMK3B (ORCPT ); Tue, 13 Feb 2018 05:29:01 -0500 Date: Tue, 13 Feb 2018 10:28:53 +0000 From: Lorenzo Pieralisi To: Kishon Vijay Abraham I Cc: Bjorn Helgaas , Niklas Cassel , Bjorn Helgaas , Sekhar Nori , Cyrille Pitchen , Niklas Cassel , Shawn Lin , John Keeping , linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH v2 1/3] PCI: endpoint: Handle 64-bit BARs properly Message-ID: <20180213102853.GA8981@e107981-ln.cambridge.arm.com> References: <20180208123346.20784-1-niklas.cassel@axis.com> <20180208123346.20784-2-niklas.cassel@axis.com> <20180208215735.GD98765@bhelgaas-glaptop.roam.corp.google.com> <5e54c525-1b78-bef3-7f83-82eb872837da@ti.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <5e54c525-1b78-bef3-7f83-82eb872837da@ti.com> User-Agent: Mutt/1.5.24 (2015-08-30) Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Fri, Feb 09, 2018 at 06:14:49PM +0530, Kishon Vijay Abraham I wrote: > Hi Bjorn, > > On Friday 09 February 2018 03:27 AM, Bjorn Helgaas wrote: > > On Thu, Feb 08, 2018 at 06:17:32PM +0530, Kishon Vijay Abraham I wrote: > >> Hi, > >> > >> On Thursday 08 February 2018 06:03 PM, Niklas Cassel wrote: > >>> A 64-bit BAR uses the succeeding BAR for the upper bits, therefore > >>> we cannot call pci_epc_set_bar() on a BAR that follows a 64-bit BAR. > >>> > >>> If pci_epc_set_bar() is called with flag PCI_BASE_ADDRESS_MEM_TYPE_64, > >> > >> Not related to $patch. But I have a query on when > >> PCI_BASE_ADDRESS_MEM_TYPE_64 should be set. Whether if the size is > > >> 4G or if the address can be mapped anywhere in the 64-bit PCIe > >> address space or both? > > > > In general, PCI_BASE_ADDRESS_MEM_TYPE_64 should be set if the BAR is > > 64 bits wide. IORESOURCE_MEM_64 is similar. > > okay, if the HW support 64bit BAR, 64 bit flag should be set and not based on > size or anything else? Yes, I completely agree with Bjorn. Actually it would be a good idea to make the struct pci_epf->bar member array an array of struct resources to simplify its handling. Thanks, Lorenzo