From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752559AbeCWUNR (ORCPT ); Fri, 23 Mar 2018 16:13:17 -0400 Received: from mail.bootlin.com ([62.4.15.54]:34936 "EHLO mail.bootlin.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751953AbeCWULi (ORCPT ); Fri, 23 Mar 2018 16:11:38 -0400 From: Alexandre Belloni To: "David S . Miller" Cc: Allan Nielsen , razvan.stefanescu@nxp.com, po.liu@nxp.com, Thomas Petazzoni , Andrew Lunn , Florian Fainelli , netdev@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-mips@linux-mips.org, Alexandre Belloni , James Hogan Subject: [PATCH net-next 7/8] MIPS: mscc: connect phys to ports on ocelot_pcb123 Date: Fri, 23 Mar 2018 21:11:16 +0100 Message-Id: <20180323201117.8416-8-alexandre.belloni@bootlin.com> X-Mailer: git-send-email 2.16.2 In-Reply-To: <20180323201117.8416-1-alexandre.belloni@bootlin.com> References: <20180323201117.8416-1-alexandre.belloni@bootlin.com> Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Add phy to switch port connections for PCB123 for internal PHYs. Cc: James Hogan Signed-off-by: Alexandre Belloni --- arch/mips/boot/dts/mscc/ocelot_pcb123.dts | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) diff --git a/arch/mips/boot/dts/mscc/ocelot_pcb123.dts b/arch/mips/boot/dts/mscc/ocelot_pcb123.dts index 29d6414f8886..66b48f664975 100644 --- a/arch/mips/boot/dts/mscc/ocelot_pcb123.dts +++ b/arch/mips/boot/dts/mscc/ocelot_pcb123.dts @@ -25,3 +25,19 @@ &uart2 { status = "okay"; }; + +&port0 { + phy-handle = <&phy0>; +}; + +&port1 { + phy-handle = <&phy1>; +}; + +&port2 { + phy-handle = <&phy2>; +}; + +&port3 { + phy-handle = <&phy3>; +}; -- 2.16.2