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Date: Wed, 28 Mar 2018 20:03:16 +0200
From: Peter Zijlstra <peterz@infradead.org>
To: Tony Luck <tony.luck@intel.com>
Cc: Sinan Kaya <okaya@codeaurora.org>,
        Paul McKenney <paulmck@linux.vnet.ibm.com>,
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        Ingo Molnar <mingo@redhat.com>, Jonathan Corbet <corbet@lwn.net>,
        "linux-ia64@vger.kernel.org" <linux-ia64@vger.kernel.org>
Subject: Re: [PATCH] docs/memory-barriers.txt: Fix broken DMA vs MMIO
 ordering example
Message-ID: <20180328180316.GN4082@hirez.programming.kicks-ass.net>
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On Wed, Mar 28, 2018 at 10:57:11AM -0700, Tony Luck wrote:
> On Wed, Mar 28, 2018 at 6:02 AM, Sinan Kaya <okaya@codeaurora.org> wrote:
> > +linux-ia64
> > Does IA64 follow this requirement? If not, is implementation planned?
> >
> > "no wmb() before writel()"
> >
> > Linus asked us to get rid of wmb() in front of writel() for UC memory.
> > Just checking that we are not breaking anything for IA64.
> 
> We should be OK on ia64, writel() uses a cast to:
> 
>  *(volatile unsigned int __force *)
> 
> which the compiler takes as a request to use a "st4.rel" instruction
> (meaning "store with release semantics"). So the value stored will
> be visible to anything that follows.

Just to nitpick, regular release semantics don't guarantee anything like
that, but ia64 never actually got around to implementing proper release
and it's a full barrier and thus what you say is true.