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Sun, 8 Apr 2018 20:27:25 -0400 From: Sasha Levin To: "stable@vger.kernel.org" , "linux-kernel@vger.kernel.org" CC: Martin Blumenstingl , Jerome Brunet , Sasha Levin Subject: [PATCH AUTOSEL for 4.9 037/293] clk: meson: meson8b: add compatibles for Meson8 and Meson8m2 Thread-Topic: [PATCH AUTOSEL for 4.9 037/293] clk: meson: meson8b: add compatibles for Meson8 and Meson8m2 Thread-Index: AQHTz5j1hf/qtLDxK0CbJFB6jdaGtA== Date: Mon, 9 Apr 2018 00:23:18 +0000 Message-ID: <20180409002239.163177-37-alexander.levin@microsoft.com> References: <20180409002239.163177-1-alexander.levin@microsoft.com> In-Reply-To: <20180409002239.163177-1-alexander.levin@microsoft.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-originating-ip: [52.168.54.252] x-ms-publictraffictype: Email x-microsoft-exchange-diagnostics: 1;DM5PR2101MB1031;7:sBoEtJVfhxvv+gYUGpzzqJDtjvSR0IVhz6q1gpl2exG/WX04pWTl7A5isZyA5B+HtFmmnRGhCgZxxpYkalNpfjQiIwvGtcrDwG1K6c5EGXF1eLKm3VBZKtnivBcQ0bgfJ0hsjmfRpqWzWyrwl8j8tySKIIzjOY3oUkYzsG6/nwpCQsR5+eNTbyh8FkdhPINTJ8lImAdXJXAGo052kfCScPTXaEIEYoOU1SV4LpHjFLbb65LVtCmQ0i6KhpS/0R3T;20:/u9w9HjioC5IDQaE6q8yzhfs6NAPge00cpvIuOx2nAe6taIEecNeJrZtR51/STidX0wJJ2kQVXX130uM4UwdF++K1EwH51Z69VRSS03QQB+XT1m0vzTIb2xBUdhsAkmEI1y14XXt9zmZzu0/Qinq66Wrq83LvLLBMuIyjYoNaUg= x-ms-office365-filtering-ht: Tenant X-MS-Office365-Filtering-Correlation-Id: 175adb8e-8832-441e-52f9-08d59db0a8b2 x-microsoft-antispam: UriScan:;BCL:0;PCL:0;RULEID:(7020095)(4652020)(48565401081)(5600026)(4604075)(3008032)(4534165)(4627221)(201703031133081)(201702281549075)(2017052603328)(7193020);SRVR:DM5PR2101MB1031; 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x-microsoft-antispam-message-info: FH+bllJcmlyY+5VbYc4nAADrVv6VVIWPPbdR953fvnArqX4ABioMvXVCSfxwcjiXufuGbGBKT4aPRfAcUde3KeXzEi44M4D/eyDKvhqjQacaXMp13M367ML99Rggi+tGZW7FvKXaxyNTtBK9m9q7oqJcTSGtVEGxjLgKzve18CQvkV+1zHE3qJgTftDMN1veNtmkpFUI+T+WoBRAZbN/uiXhbCFFvlFTiUw0op5nbCNU3d/e82/yyPGIAbj41U4MIdX7BbkND6Qgw5Qa+omECuZpFmHeFTqDjJ61SpCsMCK8BehLHBMIlHWkjU5EmEuF5rkh7ilzOr5fyDHsb9P7xPNaEZhO49nxnvKsfl309QDWchEavvVRZh9NU5IBPJp+1B/qTeNXm3M3q9qsGdanHPcHYCdxyJ3TtPnMH3SSIFs= spamdiagnosticoutput: 1:99 spamdiagnosticmetadata: NSPM Content-Type: text/plain; charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: microsoft.com X-MS-Exchange-CrossTenant-Network-Message-Id: 175adb8e-8832-441e-52f9-08d59db0a8b2 X-MS-Exchange-CrossTenant-originalarrivaltime: 09 Apr 2018 00:23:18.8467 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 72f988bf-86f1-41af-91ab-2d7cd011db47 X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM5PR2101MB1031 Sender: stable-owner@vger.kernel.org X-Mailing-List: stable@vger.kernel.org X-getmail-retrieved-from-mailbox: INBOX X-Mailing-List: linux-kernel@vger.kernel.org List-ID: From: Martin Blumenstingl [ Upstream commit 855f06a1009faabb0c6a3e9b49d115496d325856 ] The clock controller on Meson8, Meson8b and Meson8m2 is very similar based on the code from the Amlogic GPL kernel sources. Add separate compatibles for each SoC to make sure that we can easily implement all the small differences for each SoC later on. In general the Meson8 and Meson8m2 seem to be almost identical as they even share the same mach-meson8 directory in Amlogic's GPL kernel sources. The main clocks on Meson8, Meson8b and Meson8m2 are very similar, because they are all using the same PLL values, 90% of the clock gates are the same (the actual diffstat of the mach-meson8/clock.c and mach-meson8b/clock.c files is around 30 to 40 lines, when excluding all commented out code). The difference between the Meson8 and Meson8b clock gates seem to be: - Meson8 has AIU_PCLK, HDMI_RX, VCLK2_ENCT, VCLK2_ENCL, UART3, CSI_DIG_CLKIN gates which don't seem to be available on Meson8b - the gate on Meson8 for bit 7 seems to be named "_1200XXX" instead of "PERIPHS_TOP" (on Meson8b) - Meson8b has a SANA gate which doesn't seem to exist on Meson8 (or on Meson8 the same bit is used by the UART3 gate in Amlogic's GPL kernel sources) None of these gates is added for now, since it's unclear whether these definitions are actually correct (the VCLK2_ENCT gate for example is defined, but only used in some commented block). The main difference between all three SoCs seem to be the video (VPU) clocks. Apart from different supported clock rates (according to vpu.c in mach-meson8 and mach-meson8b from Amlogic's GPL kernel sources) the most notable difference is that Meson8m2 has a GP_PLL clock and a mux (probably the same as on the Meson GX SoCs) to support glitch-free (clock rate) switching. None of these VPU clocks are not supported by our mainline meson8b clock driver yet though. Signed-off-by: Martin Blumenstingl Acked-by: Rob Herring Acked-by: Kevin Hilman Signed-off-by: Jerome Brunet Signed-off-by: Sasha Levin --- .../devicetree/bindings/clock/amlogic,meson8b-clkc.txt | 11 +++++++= ---- drivers/clk/meson/Kconfig | 6 +++--- drivers/clk/meson/meson8b.c | 5 ++++- 3 files changed, 14 insertions(+), 8 deletions(-) diff --git a/Documentation/devicetree/bindings/clock/amlogic,meson8b-clkc.t= xt b/Documentation/devicetree/bindings/clock/amlogic,meson8b-clkc.txt index 2b7b3fa588d7..606da38c0959 100644 --- a/Documentation/devicetree/bindings/clock/amlogic,meson8b-clkc.txt +++ b/Documentation/devicetree/bindings/clock/amlogic,meson8b-clkc.txt @@ -1,11 +1,14 @@ -* Amlogic Meson8b Clock and Reset Unit +* Amlogic Meson8, Meson8b and Meson8m2 Clock and Reset Unit =20 -The Amlogic Meson8b clock controller generates and supplies clock to vario= us -controllers within the SoC. +The Amlogic Meson8 / Meson8b / Meson8m2 clock controller generates and +supplies clock to various controllers within the SoC. =20 Required Properties: =20 -- compatible: should be "amlogic,meson8b-clkc" +- compatible: must be one of: + - "amlogic,meson8-clkc" for Meson8 (S802) SoCs + - "amlogic,meson8b-clkc" for Meson8 (S805) SoCs + - "amlogic,meson8m2-clkc" for Meson8m2 (S812) SoCs - reg: it must be composed by two tuples: 0) physical base address of the xtal register and length of memory mapped region. diff --git a/drivers/clk/meson/Kconfig b/drivers/clk/meson/Kconfig index 2f29ee1a4d00..5588f75a8414 100644 --- a/drivers/clk/meson/Kconfig +++ b/drivers/clk/meson/Kconfig @@ -7,9 +7,9 @@ config COMMON_CLK_MESON8B bool depends on COMMON_CLK_AMLOGIC help - Support for the clock controller on AmLogic S805 devices, aka - meson8b. Say Y if you want peripherals and CPU frequency scaling to - work. + Support for the clock controller on AmLogic S802 (Meson8), + S805 (Meson8b) and S812 (Meson8m2) devices. Say Y if you + want peripherals and CPU frequency scaling to work. =20 config COMMON_CLK_GXBB bool diff --git a/drivers/clk/meson/meson8b.c b/drivers/clk/meson/meson8b.c index 3f1be46cbb33..70567958b86a 100644 --- a/drivers/clk/meson/meson8b.c +++ b/drivers/clk/meson/meson8b.c @@ -1,5 +1,6 @@ /* - * AmLogic S805 / Meson8b Clock Controller Driver + * AmLogic S802 (Meson8) / S805 (Meson8b) / S812 (Meson8m2) Clock Controll= er + * Driver * * Copyright (c) 2015 Endless Mobile, Inc. * Author: Carlo Caione @@ -661,7 +662,9 @@ iounmap: } =20 static const struct of_device_id meson8b_clkc_match_table[] =3D { + { .compatible =3D "amlogic,meson8-clkc" }, { .compatible =3D "amlogic,meson8b-clkc" }, + { .compatible =3D "amlogic,meson8m2-clkc" }, { } }; =20 --=20 2.15.1