From: Jerome Brunet <jbrunet@baylibre.com>
To: Michael Turquette <mturquette@baylibre.com>,
Stephen Boyd <sboyd@kernel.org>,
Russell King <linux@armlinux.org.uk>
Cc: Jerome Brunet <jbrunet@baylibre.com>,
linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: [PATCH 3/3] clk: mux: add duty cycle passthrough ops
Date: Mon, 16 Apr 2018 19:57:43 +0200 [thread overview]
Message-ID: <20180416175743.20826-4-jbrunet@baylibre.com> (raw)
In-Reply-To: <20180416175743.20826-1-jbrunet@baylibre.com>
A clock mux does not resample the clock signal, it give the same
signal as the selected parent, so it can use the duty cycle
passthrough operations.
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
---
drivers/clk/clk-mux.c | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/drivers/clk/clk-mux.c b/drivers/clk/clk-mux.c
index 1628b93655ed..f7c597779928 100644
--- a/drivers/clk/clk-mux.c
+++ b/drivers/clk/clk-mux.c
@@ -124,11 +124,15 @@ const struct clk_ops clk_mux_ops = {
.get_parent = clk_mux_get_parent,
.set_parent = clk_mux_set_parent,
.determine_rate = clk_mux_determine_rate,
+ .set_duty_cycle = __clk_set_duty_cycle_passthrough,
+ .get_duty_cycle = __clk_get_duty_cycle_passthrough,
};
EXPORT_SYMBOL_GPL(clk_mux_ops);
const struct clk_ops clk_mux_ro_ops = {
.get_parent = clk_mux_get_parent,
+ .set_duty_cycle = __clk_set_duty_cycle_passthrough,
+ .get_duty_cycle = __clk_get_duty_cycle_passthrough,
};
EXPORT_SYMBOL_GPL(clk_mux_ro_ops);
--
2.14.3
next prev parent reply other threads:[~2018-04-16 17:57 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-04-16 17:57 [PATCH 0/3] clk: add duty cycle support Jerome Brunet
2018-04-16 17:57 ` [PATCH 1/3] " Jerome Brunet
2018-04-17 5:43 ` Stephen Boyd
2018-04-17 6:28 ` Jerome Brunet
2018-04-16 17:57 ` [PATCH 2/3] clk: gate: add duty cycle passthrough ops Jerome Brunet
2018-04-16 17:57 ` Jerome Brunet [this message]
2018-04-17 5:49 ` [PATCH 0/3] clk: add duty cycle support Stephen Boyd
2018-04-17 6:30 ` Jerome Brunet
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