From: Marc Zyngier <marc.zyngier@arm.com>
To: Thomas Gleixner <tglx@linutronix.de>,
Jason Cooper <jason@lakedaemon.net>
Cc: Ard Biesheuvel <ard.biesheuvel@linaro.org>,
Thomas Petazzoni <thomas.petazzoni@bootlin.com>,
Miquel Raynal <miquel.raynal@bootlin.com>,
Srinivas Kandagatla <srinivas.kandagatla@linaro.org>,
linux-kernel@vger.kernel.org
Subject: [PATCH 2/7] genirq/msi: Limit level-triggered MSI to platform devices
Date: Mon, 23 Apr 2018 11:34:35 +0100 [thread overview]
Message-ID: <20180423103440.26592-3-marc.zyngier@arm.com> (raw)
In-Reply-To: <20180423103440.26592-1-marc.zyngier@arm.com>
Nobody would be insane enough to try and use level triggered
MSIs on PCI, but let's make sure it doesn't happen. Also,
let's mandate that the irqchip backing the platform MSI domain
is providing an irq_set_type method (or the whole thing would
be a bit useless).
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
---
drivers/base/platform-msi.c | 3 +++
drivers/pci/msi.c | 3 +++
2 files changed, 6 insertions(+)
diff --git a/drivers/base/platform-msi.c b/drivers/base/platform-msi.c
index 8e22073aeeed..3b9694a6beaa 100644
--- a/drivers/base/platform-msi.c
+++ b/drivers/base/platform-msi.c
@@ -101,6 +101,9 @@ static void platform_msi_update_chip_ops(struct msi_domain_info *info)
chip->irq_set_affinity = msi_domain_set_affinity;
if (!chip->irq_write_msi_msg)
chip->irq_write_msi_msg = platform_msi_write_msg;
+ if (WARN_ON((info->flags & MSI_FLAG_LEVEL_CAPABLE) &&
+ !chip->irq_set_type))
+ info->flags &= ~MSI_FLAG_LEVEL_CAPABLE;
}
static void platform_msi_free_descs(struct device *dev, int base, int nvec)
diff --git a/drivers/pci/msi.c b/drivers/pci/msi.c
index 30250631efe7..f45b74fcc059 100644
--- a/drivers/pci/msi.c
+++ b/drivers/pci/msi.c
@@ -1434,6 +1434,9 @@ struct irq_domain *pci_msi_create_irq_domain(struct fwnode_handle *fwnode,
{
struct irq_domain *domain;
+ if (WARN_ON(info->flags & MSI_FLAG_LEVEL_CAPABLE))
+ info->flags &= ~MSI_FLAG_LEVEL_CAPABLE;
+
if (info->flags & MSI_FLAG_USE_DEF_DOM_OPS)
pci_msi_domain_update_dom_ops(info);
if (info->flags & MSI_FLAG_USE_DEF_CHIP_OPS)
--
2.14.2
next prev parent reply other threads:[~2018-04-23 10:35 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-04-23 10:34 [PATCH 0/7] Level-triggered MSI support Marc Zyngier
2018-04-23 10:34 ` [PATCH 1/7] genirq/msi: Allow level-triggered MSIs to be exposed by MSI providers Marc Zyngier
2018-04-23 10:34 ` Marc Zyngier [this message]
2018-04-26 19:50 ` [PATCH 2/7] genirq/msi: Limit level-triggered MSI to platform devices Thomas Gleixner
2018-05-01 10:15 ` Marc Zyngier
2018-04-23 10:34 ` [PATCH 3/7] irqchip/mvebu-gicp: Use level-triggered MSIs between ICU and GICP Marc Zyngier
2018-04-23 10:34 ` [PATCH 4/7] dma-iommu: Fix compilation when !CONFIG_IOMMU_DMA Marc Zyngier
2018-04-23 10:34 ` [PATCH 5/7] irqchip/gic-v3: Add support for Message Based Interrupts as an MSI controller Marc Zyngier
2018-04-26 20:53 ` Thomas Gleixner
2018-04-23 10:34 ` [PATCH 6/7] irqchip/gic-v3: Add PCI/MSI support to the GICv3 MBI sub-driver Marc Zyngier
2018-04-23 10:34 ` [PATCH 7/7] dt-bindings/gic-v3: Add documentation for MBI support Marc Zyngier
2018-04-23 11:51 ` [PATCH 0/7] Level-triggered MSI support Ard Biesheuvel
2018-04-23 12:31 ` Marc Zyngier
2018-04-23 15:53 ` Marc Zyngier
2018-04-23 16:48 ` Ard Biesheuvel
2018-04-23 12:43 ` Srinivas Kandagatla
2018-04-23 15:32 ` Miquel Raynal
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