From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751855AbeEJSsP (ORCPT ); Thu, 10 May 2018 14:48:15 -0400 Received: from outils.crapouillou.net ([89.234.176.41]:54970 "EHLO crapouillou.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1750881AbeEJSsN (ORCPT ); Thu, 10 May 2018 14:48:13 -0400 From: Paul Cercueil To: Guenter Roeck , Rob Herring , Mark Rutland , Ralf Baechle , James Hogan Cc: Wim Van Sebroeck , Mathieu Malaterre , linux-watchdog@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-mips@linux-mips.org, Paul Cercueil Subject: [PATCH v3 1/8] watchdog: JZ4740: Disable clock after stopping counter Date: Thu, 10 May 2018 20:47:44 +0200 Message-Id: <20180510184751.13416-1-paul@crapouillou.net> Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Previously, the clock was disabled first, which makes the watchdog component insensitive to register writes. Signed-off-by: Paul Cercueil Reviewed-by: Guenter Roeck --- drivers/watchdog/jz4740_wdt.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) v2: No change v3: No change diff --git a/drivers/watchdog/jz4740_wdt.c b/drivers/watchdog/jz4740_wdt.c index aafbeb96561b..55c9a1f26498 100644 --- a/drivers/watchdog/jz4740_wdt.c +++ b/drivers/watchdog/jz4740_wdt.c @@ -124,8 +124,8 @@ static int jz4740_wdt_stop(struct watchdog_device *wdt_dev) { struct jz4740_wdt_drvdata *drvdata = watchdog_get_drvdata(wdt_dev); - jz4740_timer_disable_watchdog(); writeb(0x0, drvdata->base + JZ_REG_WDT_COUNTER_ENABLE); + jz4740_timer_disable_watchdog(); return 0; } -- 2.11.0