From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751174AbeEVGX7 (ORCPT ); Tue, 22 May 2018 02:23:59 -0400 Received: from mail-pg0-f68.google.com ([74.125.83.68]:36275 "EHLO mail-pg0-f68.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1750709AbeEVGXz (ORCPT ); Tue, 22 May 2018 02:23:55 -0400 X-Google-Smtp-Source: AB8JxZo5OrNo9l2l42u2moqmVYXPzby7D2yUGjLJ3AQIiQ7pwYV37jcjwq7FMch85C0xYBamyetb8g== From: Stephen Boyd To: Andy Gross Cc: linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH] arm64: dts: qcom: Add pmu node to sdm845 Date: Mon, 21 May 2018 23:23:52 -0700 Message-Id: <20180522062352.151257-1-swboyd@chromium.org> X-Mailer: git-send-email 2.17.0.441.gb46fe60e1d-goog Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Add the CPU PMU on sdm845 to get perf support for hardware events. Signed-off-by: Stephen Boyd --- arch/arm64/boot/dts/qcom/sdm845.dtsi | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi b/arch/arm64/boot/dts/qcom/sdm845.dtsi index 7c85e7c596db..93a62c2be86c 100644 --- a/arch/arm64/boot/dts/qcom/sdm845.dtsi +++ b/arch/arm64/boot/dts/qcom/sdm845.dtsi @@ -152,6 +152,11 @@ }; }; + pmu { + compatible = "arm,armv8-pmuv3"; + interrupts = ; + }; + timer { compatible = "arm,armv8-timer"; interrupts = , -- Sent by a computer through tubes