From: Richard Cochran <richardcochran@gmail.com>
To: "Y.b. Lu" <yangbo.lu@nxp.com>
Cc: Madalin-cristian Bucur <madalin.bucur@nxp.com>,
Claudiu Manoil <claudiu.manoil@nxp.com>,
Xiaobo Xie <xiaobo.xie@nxp.com>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>
Subject: Re: PTP clock driver for FSL DPAA
Date: Tue, 22 May 2018 07:37:15 -0700 [thread overview]
Message-ID: <20180522143715.7um4fot2zfowkbm2@localhost> (raw)
In-Reply-To: <DB6PR0401MB2536003AE2494FFE5AB7516FF8940@DB6PR0401MB2536.eurprd04.prod.outlook.com>
On Tue, May 22, 2018 at 10:07:20AM +0000, Y.b. Lu wrote:
> I'm going to make a PTP clock driver patch for FSL DPAA ethernet controller. (drivers/net/ethernet/freescale/dpaa/)
> Actually the 1588 timer module on FSL DPAA is same with the one on FSL eTSEC in hardware.(whose PTP clock driver is drivers/net/ethernet/freescale/gianfar_ptp.c)
>
> So there are two options for me I think.
> Option #1, just make a dpaa_ptp.c driver which will be almost same with gianfar_ptp.c.
> Option #2, try to reuse gianfar_ptp.c driver by reworking it as a common driver, renaming it, and putting it to a common place (drivers/ptp/ or still drivers/net/ethernet/freescale/).
If you can make it work, #2 sounds like the best solution.
Thanks,
Richard
next parent reply other threads:[~2018-05-22 14:37 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <DB6PR0401MB2536003AE2494FFE5AB7516FF8940@DB6PR0401MB2536.eurprd04.prod.outlook.com>
2018-05-22 14:37 ` Richard Cochran [this message]
2018-05-22 10:13 Y.b. Lu
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