From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-0.8 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, MAILING_LIST_MULTI,SPF_PASS,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 99D7BC5CFC0 for ; Mon, 18 Jun 2018 15:05:04 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 5E3D6208A5 for ; Mon, 18 Jun 2018 15:05:04 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 5E3D6208A5 Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=bootlin.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S964852AbeFRPAk (ORCPT ); Mon, 18 Jun 2018 11:00:40 -0400 Received: from mail.bootlin.com ([62.4.15.54]:41734 "EHLO mail.bootlin.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S964806AbeFRPAh (ORCPT ); Mon, 18 Jun 2018 11:00:37 -0400 Received: by mail.bootlin.com (Postfix, from userid 110) id 7DDC2207C2; Mon, 18 Jun 2018 17:00:35 +0200 (CEST) Received: from localhost.localdomain (AAubervilliers-681-1-50-153.w90-88.abo.wanadoo.fr [90.88.168.153]) by mail.bootlin.com (Postfix) with ESMTPSA id 6743D20650; Mon, 18 Jun 2018 17:00:22 +0200 (CEST) From: Paul Kocialkowski To: linux-media@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Cc: Mauro Carvalho Chehab , Rob Herring , Mark Rutland , Maxime Ripard , Chen-Yu Tsai , Paul Kocialkowski , Marco Franchi , Icenowy Zheng , Hans Verkuil , Sylwester Nawrocki , Tom Saeger , Smitha T Murthy , Sakari Ailus , Andrzej Hajda , Jonathan Corbet , "David S . Miller" , Andrew Morton , Greg Kroah-Hartman , Linus Walleij , Randy Dunlap , Arnd Bergmann , Stanimir Varbanov , Philipp Zabel , Ramesh Shanmugasundaram , Jacob Chen , Steve Longerbeam , Todor Tomov , Jacopo Mondi , Alexandre Courbot , Marek Szyprowski , Andy Shevchenko , Tomasz Figa , Ricardo Ribalda Delgado , Hans de Goede , Sami Tolvanen , Thomas Petazzoni , linux-sunxi@googlegroups.com, Hugues Fruchet , Randy Li Subject: [PATCH v4 17/19] ARM: dts: sun5i: Add Video Engine and reserved memory nodes Date: Mon, 18 Jun 2018 16:58:41 +0200 Message-Id: <20180618145843.14631-18-paul.kocialkowski@bootlin.com> X-Mailer: git-send-email 2.17.0 In-Reply-To: <20180618145843.14631-1-paul.kocialkowski@bootlin.com> References: <20180618145843.14631-1-paul.kocialkowski@bootlin.com> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org This adds nodes for the Video Engine and the associated reserved memory for sun5i-based platforms. Up to 96 MiB of memory are dedicated to the CMA pool. The VPU can only map the first 256 MiB of DRAM, so the reserved memory pool has to be located in that area. Following Allwinner's decision in downstream software, the last 96 MiB of the first 256 MiB of RAM are reserved for this purpose. Signed-off-by: Paul Kocialkowski diff --git a/arch/arm/boot/dts/sun5i.dtsi b/arch/arm/boot/dts/sun5i.dtsi index 6fa9e28edc59..3138f791b6b2 100644 --- a/arch/arm/boot/dts/sun5i.dtsi +++ b/arch/arm/boot/dts/sun5i.dtsi @@ -108,6 +108,21 @@ }; }; + reserved-memory { + #address-cells = <1>; + #size-cells = <1>; + ranges; + + /* Address must be kept in the lower 256 MiBs of DRAM for VE. */ + cma_pool: cma@4a000000 { + compatible = "shared-dma-pool"; + size = <0x6000000>; + alloc-ranges = <0x4a000000 0x6000000>; + reusable; + linux,cma-default; + }; + }; + soc@1c00000 { compatible = "simple-bus"; #address-cells = <1>; @@ -292,6 +307,19 @@ }; }; + vpu: video-codec@1c0e000 { + compatible = "allwinner,sun5i-a13-video-engine"; + reg = <0x01c0e000 0x1000>; + + clocks = <&ccu CLK_AHB_VE>, <&ccu CLK_VE>, + <&ccu CLK_DRAM_VE>; + clock-names = "ahb", "mod", "ram"; + + resets = <&ccu RST_VE>; + interrupts = <53>; + allwinner,sram = <&ve_sram 1>; + }; + mmc0: mmc@1c0f000 { compatible = "allwinner,sun5i-a13-mmc"; reg = <0x01c0f000 0x1000>; -- 2.17.0