From: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
To: Thomas Gleixner <tglx@linutronix.de>,
Ingo Molnar <mingo@redhat.com>, "H. Peter Anvin" <hpa@zytor.com>,
x86@kernel.org, Pavel Tatashin <pasha.tatashin@oracle.com>,
linux-kernel@vger.kernel.org
Cc: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Subject: [PATCH v1 0/6] x86/tsc: Clean up legacy code for Intel MID
Date: Fri, 29 Jun 2018 22:31:07 +0300 [thread overview]
Message-ID: <20180629193113.84425-1-andriy.shevchenko@linux.intel.com> (raw)
As Thomas noticed there is unusual initialization is going on on Intel MID
platforms when TSC is being calibrated.
It appears that we have tsc_msr.c to support Intel MID in a more generic way.
So, this patch series removes legacy calibration code and does accompanying
clean ups.
Has been tested on Intel Medfield and Intel Merrifield platforms.
Andy Shevchenko (6):
x86/cpu: Introduce INTEL_CPU_FAM*() helper macros
x86/tsc: Convert to use x86_match_cpu() and INTEL_CPU_FAM6()
x86/tsc: Add missed header to tsc_msr.c
x86/tsc: Use SPDX identifier and update Intel copyright
x86/platform/intel-mid: Remove custom TSC calibration
x86/platform/intel-mid: Remove per platform code
arch/x86/include/asm/intel-family.h | 13 +++
arch/x86/include/asm/intel-mid.h | 43 -------
arch/x86/kernel/tsc_msr.c | 96 ++++++++--------
arch/x86/platform/intel-mid/Makefile | 2 +-
arch/x86/platform/intel-mid/intel-mid.c | 23 +---
.../platform/intel-mid/intel_mid_weak_decls.h | 18 ---
arch/x86/platform/intel-mid/mfld.c | 70 ------------
arch/x86/platform/intel-mid/mrfld.c | 105 ------------------
8 files changed, 66 insertions(+), 304 deletions(-)
delete mode 100644 arch/x86/platform/intel-mid/intel_mid_weak_decls.h
delete mode 100644 arch/x86/platform/intel-mid/mfld.c
delete mode 100644 arch/x86/platform/intel-mid/mrfld.c
--
2.18.0
next reply other threads:[~2018-06-29 19:32 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-06-29 19:31 Andy Shevchenko [this message]
2018-06-29 19:31 ` [PATCH v1 1/6] x86/cpu: Introduce INTEL_CPU_FAM*() helper macros Andy Shevchenko
2018-07-03 11:13 ` [tip:x86/timers] " tip-bot for Andy Shevchenko
2018-06-29 19:31 ` [PATCH v1 2/6] x86/tsc: Convert to use x86_match_cpu() and INTEL_CPU_FAM6() Andy Shevchenko
2018-07-03 11:14 ` [tip:x86/timers] " tip-bot for Andy Shevchenko
2018-06-29 19:31 ` [PATCH v1 3/6] x86/tsc: Add missed header to tsc_msr.c Andy Shevchenko
2018-07-03 11:13 ` [tip:x86/timers] x86/tsc: Add missing " tip-bot for Andy Shevchenko
2018-06-29 19:31 ` [PATCH v1 4/6] x86/tsc: Use SPDX identifier and update Intel copyright Andy Shevchenko
2018-07-03 11:14 ` [tip:x86/timers] " tip-bot for Andy Shevchenko
2018-06-29 19:31 ` [PATCH v1 5/6] x86/platform/intel-mid: Remove custom TSC calibration Andy Shevchenko
2018-07-03 11:15 ` [tip:x86/timers] " tip-bot for Andy Shevchenko
2018-06-29 19:31 ` [PATCH v1 6/6] x86/platform/intel-mid: Remove per platform code Andy Shevchenko
2018-07-03 11:15 ` [tip:x86/timers] " tip-bot for Andy Shevchenko
2018-06-30 9:24 ` [PATCH v1 0/6] x86/tsc: Clean up legacy code for Intel MID Thomas Gleixner
2018-06-30 11:59 ` Andy Shevchenko
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