From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-2.8 required=3.0 tests=DATE_IN_FUTURE_06_12, HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI,SPF_PASS,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id CA48AC3279B for ; Mon, 2 Jul 2018 13:34:45 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 8E06424104 for ; Mon, 2 Jul 2018 13:34:45 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 8E06424104 Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=amlogic.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752609AbeGBNeo (ORCPT ); Mon, 2 Jul 2018 09:34:44 -0400 Received: from mail-sh2.amlogic.com ([58.32.228.45]:30186 "EHLO mail-sh2.amlogic.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752288AbeGBNeY (ORCPT ); Mon, 2 Jul 2018 09:34:24 -0400 Received: from localhost.localdomain (10.18.20.250) by mail-sh2.amlogic.com (10.18.11.6) with Microsoft SMTP Server id 15.0.1320.4; Mon, 2 Jul 2018 21:34:35 +0800 From: Yixun Lan To: Jerome Brunet , Neil Armstrong CC: Yixun Lan , Kevin Hilman , Carlo Caione , Michael Turquette , Stephen Boyd , Qiufang Dai , Jian Hu , Jianxin Qin , , , , , Subject: [PATCH v2 0/2] clk: meson-axg: add pcie related clocks Date: Mon, 2 Jul 2018 21:31:16 +0000 Message-ID: <20180702213118.19222-1-yixun.lan@amlogic.com> X-Mailer: git-send-email 2.18.0 MIME-Version: 1.0 Content-Type: text/plain X-Originating-IP: [10.18.20.250] Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org This patch series try to add clocks for the pcie driver, Due to ASIC desigin, the mipi clock is also required by the pcie controller, so we also added in this patch series. Changes since v1 at [1]: -- Separate dt-binding header files -- use table to exclude unwanted clock parent [1] https://lkml.kernel.org/r/20180621122620.13195-1-yixun.lan@amlogic.com Yixun Lan (2): clk: meson-axg: add pcie and mipi clock bindings clk: meson-axg: add clocks required by pcie driver drivers/clk/meson/axg.c | 148 +++++++++++++++++++++++++++ drivers/clk/meson/axg.h | 6 +- include/dt-bindings/clock/axg-clkc.h | 3 + 3 files changed, 156 insertions(+), 1 deletion(-) -- 2.18.0