From: Peter Zijlstra <peterz@infradead.org>
To: David Laight <David.Laight@ACULAB.COM>
Cc: "'Paul Burton'" <paul.burton@mips.com>, 陈华才 <chenhc@lemote.com>,
"Ralf Baechle" <ralf@linux-mips.org>,
"James Hogan" <jhogan@kernel.org>,
linux-mips <linux-mips@linux-mips.org>,
"Fuxin Zhang" <zhangfx@lemote.com>,
wuzhangjin <wuzhangjin@gmail.com>,
stable <stable@vger.kernel.org>,
"Alan Stern" <stern@rowland.harvard.edu>,
"Andrea Parri" <andrea.parri@amarulasolutions.com>,
"Will Deacon" <will.deacon@arm.com>,
"Boqun Feng" <boqun.feng@gmail.com>,
"Nicholas Piggin" <npiggin@gmail.com>,
"David Howells" <dhowells@redhat.com>,
"Jade Alglave" <j.alglave@ucl.ac.uk>,
"Luc Maranget" <luc.maranget@inria.fr>,
"Paul E. McKenney" <paulmck@linux.vnet.ibm.com>,
"Akira Yokosawa" <akiyks@gmail.com>,
LKML <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH V2] MIPS: implement smp_cond_load_acquire() for Loongson-3
Date: Wed, 11 Jul 2018 12:55:46 +0200 [thread overview]
Message-ID: <20180711105546.GB2476@hirez.programming.kicks-ass.net> (raw)
In-Reply-To: <1a072b07261b46d88938f0f709f54d42@AcuMS.aculab.com>
On Wed, Jul 11, 2018 at 10:04:52AM +0000, David Laight wrote:
> I also suspect that 'write starvation' is also common - after all the
> purpose of the store buffer is to do reads in preference to writes in
> order to reduce the cpu stalls waiting for the memory bus (probably
> the cpu to cache interface).
>
> I think your example is just:
> *(volatile int *)xxx = 1;
> while (!*(volatile int *)yyy) continue;
> running on two cpu with xxx and yyy swapped?
Yep. And Linux has been relying on that working for (afaict) basically
forever.
> You need a stronger bus cycle in there somewhere.
Since all spin-wait loops _should_ have cpu_relax() that is the natural
place to put it.
next prev parent reply other threads:[~2018-07-11 10:56 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <1531103198-16764-1-git-send-email-chenhc@lemote.com>
2018-07-09 16:49 ` Paul Burton
2018-07-10 4:26 ` Huacai Chen
2018-07-10 9:36 ` Peter Zijlstra
2018-07-10 10:54 ` Peter Zijlstra
2018-07-10 11:45 ` 陈华才
2018-07-10 12:17 ` Peter Zijlstra
2018-07-10 16:14 ` Paul E. McKenney
2018-07-10 17:10 ` Paul Burton
2018-07-11 10:04 ` David Laight
2018-07-11 10:55 ` Peter Zijlstra [this message]
2018-07-11 10:05 ` Jiaxun Yang
2018-07-11 10:21 ` Will Deacon
2018-07-11 11:09 ` Peter Zijlstra
2018-07-11 11:46 ` David Laight
2018-07-11 9:43 ` Will Deacon
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