From: Paul Cercueil <paul@crapouillou.net>
To: Vinod Koul <vkoul@kernel.org>, Rob Herring <robh+dt@kernel.org>,
Mark Rutland <mark.rutland@arm.com>,
Ralf Baechle <ralf@linux-mips.org>,
Paul Burton <paul.burton@mips.com>,
James Hogan <jhogan@kernel.org>,
Zubair Lutfullah Kakakhel <Zubair.Kakakhel@imgtec.com>
Cc: Mathieu Malaterre <malat@debian.org>,
Daniel Silsby <dansilsby@gmail.com>,
Paul Cercueil <paul@crapouillou.net>,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
linux-mips@linux-mips.org
Subject: [PATCH v2 03/17] dmaengine: dma-jz4780: Avoid hardcoding number of channels
Date: Wed, 18 Jul 2018 20:20:09 +0200 [thread overview]
Message-ID: <20180718182023.8182-4-paul@crapouillou.net> (raw)
In-Reply-To: <20180718182023.8182-1-paul@crapouillou.net>
As part of the work to support various other Ingenic JZ47xx SoC versions,
which don't feature the same number of DMA channels per core, we now
deduce the number of DMA channels available from the devicetree
compatible string.
Signed-off-by: Paul Cercueil <paul@crapouillou.net>
Tested-by: Mathieu Malaterre <malat@debian.org>
---
drivers/dma/dma-jz4780.c | 53 +++++++++++++++++++++++++++++++++++-------------
1 file changed, 39 insertions(+), 14 deletions(-)
v2: - don't hardcode jz_version to ID_JZ4780 when not probed from DT,
because it cannot happen
- Put SoC-specific data into a jz4780_dma_soc_data structure
diff --git a/drivers/dma/dma-jz4780.c b/drivers/dma/dma-jz4780.c
index 987899610b46..a26107c85ee7 100644
--- a/drivers/dma/dma-jz4780.c
+++ b/drivers/dma/dma-jz4780.c
@@ -16,6 +16,7 @@
#include <linux/interrupt.h>
#include <linux/module.h>
#include <linux/of.h>
+#include <linux/of_device.h>
#include <linux/of_dma.h>
#include <linux/platform_device.h>
#include <linux/slab.h>
@@ -23,8 +24,6 @@
#include "dmaengine.h"
#include "virt-dma.h"
-#define JZ_DMA_NR_CHANNELS 32
-
/* Global registers. */
#define JZ_DMA_REG_DMAC 0x1000
#define JZ_DMA_REG_DIRQP 0x1004
@@ -135,14 +134,24 @@ struct jz4780_dma_chan {
unsigned int curr_hwdesc;
};
+enum jz_version {
+ ID_JZ4780,
+};
+
+struct jz4780_dma_soc_data {
+ unsigned int nb_channels;
+};
+
struct jz4780_dma_dev {
struct dma_device dma_device;
void __iomem *base;
struct clk *clk;
unsigned int irq;
+ enum jz_version version;
+ const struct jz4780_dma_soc_data *soc_data;
uint32_t chan_reserved;
- struct jz4780_dma_chan chan[JZ_DMA_NR_CHANNELS];
+ struct jz4780_dma_chan chan[];
};
struct jz4780_dma_filter_data {
@@ -648,7 +657,7 @@ static irqreturn_t jz4780_dma_irq_handler(int irq, void *data)
pending = jz4780_dma_readl(jzdma, JZ_DMA_REG_DIRQP);
- for (i = 0; i < JZ_DMA_NR_CHANNELS; i++) {
+ for (i = 0; i < jzdma->soc_data->nb_channels; i++) {
if (!(pending & (1<<i)))
continue;
@@ -728,7 +737,7 @@ static struct dma_chan *jz4780_of_dma_xlate(struct of_phandle_args *dma_spec,
data.channel = dma_spec->args[1];
if (data.channel > -1) {
- if (data.channel >= JZ_DMA_NR_CHANNELS) {
+ if (data.channel >= jzdma->soc_data->nb_channels) {
dev_err(jzdma->dma_device.dev,
"device requested non-existent channel %u\n",
data.channel);
@@ -752,13 +761,27 @@ static struct dma_chan *jz4780_of_dma_xlate(struct of_phandle_args *dma_spec,
}
}
+static const struct jz4780_dma_soc_data jz4780_dma_soc_data[] = {
+ [ID_JZ4780] = { .nb_channels = 32, },
+};
+
+static const struct of_device_id jz4780_dma_dt_match[] = {
+ { .compatible = "ingenic,jz4780-dma", .data = (void *)ID_JZ4780 },
+ {},
+};
+MODULE_DEVICE_TABLE(of, jz4780_dma_dt_match);
+
static int jz4780_dma_probe(struct platform_device *pdev)
{
struct device *dev = &pdev->dev;
+ const struct of_device_id *of_id = of_match_device(
+ jz4780_dma_dt_match, dev);
+ const struct jz4780_dma_soc_data *soc_data;
struct jz4780_dma_dev *jzdma;
struct jz4780_dma_chan *jzchan;
struct dma_device *dd;
struct resource *res;
+ enum jz_version version;
int i, ret;
if (!dev->of_node) {
@@ -766,10 +789,18 @@ static int jz4780_dma_probe(struct platform_device *pdev)
return -EINVAL;
}
- jzdma = devm_kzalloc(dev, sizeof(*jzdma), GFP_KERNEL);
+ version = (enum jz_version)of_id->data;
+ soc_data = &jz4780_dma_soc_data[version];
+
+ jzdma = devm_kzalloc(dev, sizeof(*jzdma)
+ + sizeof(*jzdma->chan) * soc_data->nb_channels,
+ GFP_KERNEL);
if (!jzdma)
return -ENOMEM;
+ jzdma->soc_data = soc_data;
+ jzdma->version = version;
+
platform_set_drvdata(pdev, jzdma);
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
@@ -844,7 +875,7 @@ static int jz4780_dma_probe(struct platform_device *pdev)
INIT_LIST_HEAD(&dd->channels);
- for (i = 0; i < JZ_DMA_NR_CHANNELS; i++) {
+ for (i = 0; i < soc_data->nb_channels; i++) {
jzchan = &jzdma->chan[i];
jzchan->id = i;
@@ -889,19 +920,13 @@ static int jz4780_dma_remove(struct platform_device *pdev)
free_irq(jzdma->irq, jzdma);
- for (i = 0; i < JZ_DMA_NR_CHANNELS; i++)
+ for (i = 0; i < jzdma->soc_data->nb_channels; i++)
tasklet_kill(&jzdma->chan[i].vchan.task);
dma_async_device_unregister(&jzdma->dma_device);
return 0;
}
-static const struct of_device_id jz4780_dma_dt_match[] = {
- { .compatible = "ingenic,jz4780-dma", .data = NULL },
- {},
-};
-MODULE_DEVICE_TABLE(of, jz4780_dma_dt_match);
-
static struct platform_driver jz4780_dma_driver = {
.probe = jz4780_dma_probe,
.remove = jz4780_dma_remove,
--
2.11.0
next prev parent reply other threads:[~2018-07-18 18:20 UTC|newest]
Thread overview: 21+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-07-18 18:20 [PATCH v2 00/17] JZ4780 DMA patchset v2 Paul Cercueil
2018-07-18 18:20 ` [PATCH v2 01/17] doc: dt-bindings: jz4780-dma: Update bindings to reflect driver changes Paul Cercueil
2018-07-18 18:20 ` [PATCH v2 02/17] dmaengine: dma-jz4780: Return error if not probed from DT Paul Cercueil
2018-07-18 18:20 ` Paul Cercueil [this message]
2018-07-18 18:20 ` [PATCH v2 04/17] dmaengine: dma-jz4780: Separate chan/ctrl registers Paul Cercueil
2018-07-18 18:20 ` [PATCH v2 05/17] dmaengine: dma-jz4780: Use 4-word descriptors Paul Cercueil
2018-07-18 18:20 ` [PATCH v2 06/17] dmaengine: dma-jz4780: Add support for the JZ4770 SoC Paul Cercueil
2018-07-18 18:20 ` [PATCH v2 07/17] dmaengine: dma-jz4780: Add support for the JZ4740 SoC Paul Cercueil
2018-07-18 18:20 ` [PATCH v2 08/17] dmaengine: dma-jz4780: Add support for the JZ4725B SoC Paul Cercueil
2018-07-18 18:20 ` [PATCH v2 09/17] dmaengine: dma-jz4780: Enable Fast DMA to the AIC Paul Cercueil
2018-07-18 18:20 ` [PATCH v2 10/17] dmaengine: dma-jz4780: Add missing residue DTC mask Paul Cercueil
2018-07-18 18:20 ` [PATCH v2 11/17] dmaengine: dma-jz4780: Simplify jz4780_dma_desc_residue() Paul Cercueil
2018-07-18 18:20 ` [PATCH v2 12/17] dmaengine: dma-jz4780: Set DTCn register explicitly Paul Cercueil
2018-07-18 18:20 ` [PATCH v2 13/17] dmaengine: dma-jz4780: Further residue status fix Paul Cercueil
2018-07-18 18:20 ` [PATCH v2 14/17] dmaengine: dma-jz4780: Use dma_set_residue() Paul Cercueil
2018-07-18 18:20 ` [PATCH v2 15/17] MIPS: JZ4780: DTS: Update DMA node to match driver changes Paul Cercueil
2018-07-18 18:20 ` [PATCH v2 16/17] MIPS: JZ4770: DTS: Add DMA nodes Paul Cercueil
2018-07-19 8:06 ` Sergei Shtylyov
2018-07-18 18:20 ` [PATCH v2 17/17] MIPS: JZ4740: " Paul Cercueil
2018-07-19 8:03 ` Sergei Shtylyov
2018-07-19 3:56 ` [PATCH v2 00/17] JZ4780 DMA patchset v2 Vinod
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