From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-2.8 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, MAILING_LIST_MULTI,SPF_PASS,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 642DBC433F4 for ; Thu, 30 Aug 2018 15:08:04 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 26F81205C9 for ; Thu, 30 Aug 2018 15:08:04 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 26F81205C9 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=nvidia.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729877AbeH3TKh (ORCPT ); Thu, 30 Aug 2018 15:10:37 -0400 Received: from hqemgate14.nvidia.com ([216.228.121.143]:13536 "EHLO hqemgate14.nvidia.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1729853AbeH3TKg (ORCPT ); Thu, 30 Aug 2018 15:10:36 -0400 Received: from hqpgpgate102.nvidia.com (Not Verified[216.228.121.13]) by hqemgate14.nvidia.com (using TLS: TLSv1.2, DES-CBC3-SHA) id ; Thu, 30 Aug 2018 08:07:59 -0700 Received: from HQMAIL106.nvidia.com ([172.20.161.6]) by hqpgpgate102.nvidia.com (PGP Universal service); Thu, 30 Aug 2018 08:08:01 -0700 X-PGP-Universal: processed; by hqpgpgate102.nvidia.com on Thu, 30 Aug 2018 08:08:01 -0700 Received: from HQMAIL110.nvidia.com (172.18.146.15) by HQMAIL106.nvidia.com (172.18.146.12) with Microsoft SMTP Server (TLS) id 15.0.1395.4; Thu, 30 Aug 2018 15:08:01 +0000 Received: from HQMAIL104.nvidia.com (172.18.146.11) by hqmail110.nvidia.com (172.18.146.15) with Microsoft SMTP Server (TLS) id 15.0.1395.4; Thu, 30 Aug 2018 15:08:00 +0000 Received: from hqnvemgw01.nvidia.com (172.20.150.20) by HQMAIL104.nvidia.com (172.18.146.11) with Microsoft SMTP Server (TLS) id 15.0.1395.4 via Frontend Transport; Thu, 30 Aug 2018 15:08:00 +0000 Received: from dhcp-10-21-25-168.Nvidia.com (Not Verified[10.21.25.201]) by hqnvemgw01.nvidia.com with Trustwave SEG (v7,5,8,10121) id ; Thu, 30 Aug 2018 08:08:00 -0700 From: Aapo Vienamo To: Rob Herring , Mark Rutland , Thierry Reding , Jonathan Hunter , Ulf Hansson , Adrian Hunter , Mikko Perttunen , "Stefan Agner" CC: , , , , Aapo Vienamo Subject: [PATCH v3 24/38] mmc: tegra: Remove tegra_sdhci_writew() from tegra210_sdhci_ops Date: Thu, 30 Aug 2018 18:06:25 +0300 Message-ID: <20180830150639.21048-25-avienamo@nvidia.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20180830150639.21048-1-avienamo@nvidia.com> References: <20180830150639.21048-1-avienamo@nvidia.com> MIME-Version: 1.0 Content-Type: text/plain Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org tegra_sdhci_writew() defers the write to SDHCI_TRANSFER_MODE until SDHCI_COMMAND is written. This is not necessary on Tegra210 and Tegra186 and it breaks read-modify-write operations on SDHCI_TRANSFER_MODE because writes to SDHCI_TRANSFER_MODE aren't visible until SDHCI_COMMAND has been written to. This results in tuning failures on Tegra210. Signed-off-by: Aapo Vienamo --- drivers/mmc/host/sdhci-tegra.c | 1 - 1 file changed, 1 deletion(-) diff --git a/drivers/mmc/host/sdhci-tegra.c b/drivers/mmc/host/sdhci-tegra.c index f68557a01d5d..0bdce437e752 100644 --- a/drivers/mmc/host/sdhci-tegra.c +++ b/drivers/mmc/host/sdhci-tegra.c @@ -834,7 +834,6 @@ static const struct sdhci_tegra_soc_data soc_data_tegra124 = { static const struct sdhci_ops tegra210_sdhci_ops = { .get_ro = tegra_sdhci_get_ro, .read_w = tegra_sdhci_readw, - .write_w = tegra_sdhci_writew, .write_l = tegra_sdhci_writel, .set_clock = tegra_sdhci_set_clock, .set_bus_width = sdhci_set_bus_width, -- 2.18.0