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Sun, 2 Sep 2018 13:07:45 +0000 Received: from CY4PR21MB0776.namprd21.prod.outlook.com ([fe80::7c3a:eea8:1391:1611]) by CY4PR21MB0776.namprd21.prod.outlook.com ([fe80::7c3a:eea8:1391:1611%7]) with mapi id 15.20.1143.000; Sun, 2 Sep 2018 13:07:45 +0000 From: Sasha Levin To: "stable@vger.kernel.org" , "linux-kernel@vger.kernel.org" CC: Daniel Kurtz , Linus Walleij , Sasha Levin Subject: [PATCH AUTOSEL 4.14 52/89] pinctrl/amd: only handle irq if it is pending and unmasked Thread-Topic: [PATCH AUTOSEL 4.14 52/89] pinctrl/amd: only handle irq if it is pending and unmasked Thread-Index: AQHUQr3e58e+S8/x+USBo4PFJ3+sdg== Date: Sun, 2 Sep 2018 13:07:14 +0000 Message-ID: <20180902064918.183387-52-alexander.levin@microsoft.com> References: <20180902064918.183387-1-alexander.levin@microsoft.com> In-Reply-To: <20180902064918.183387-1-alexander.levin@microsoft.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-originating-ip: [52.168.54.252] x-ms-publictraffictype: Email x-microsoft-exchange-diagnostics: 1;CY4PR21MB0503;6:pgcXCaJj00hjdYzZ2INPLWqfwPqcTK8DGYgTXWzrNjQh9fvDXGIaY7THLpSEDMtqyaz7O5A1MDovrN8eJoQQFeJuWkRqlj2jDnF6Z1gEELOs3k2r9QZTOjWyIT6FW/CbJ835hJWEyecMQd50TV1HqyecXpomEAgLi7mH1qDbroRUMtOeCe6aFXTfLL0IYflyxHzE27K9N97O4hI7uAsdPAT78hLfBb3RUt4QLbfaULLnsnUU2oAd8PYIEmrPaKzck6KsscoVwpri26UeWkPDBaytJF1dSsHVD9WrT5uqYgCws0PBHePBzEuykw+7P7L5z+rAMnkrxLZ3P6zaJf+1DxPMjja170U/NPS94WQT133nBf4JXjjzn+ALtYKCNxbJqOWPAFZVvFV/N8m2ucbgX0ZiVW2oMlLOTNOso7g43GUk3CH+WBUyl3XWjSNuxUjdzaE815GaT4dlYPm+BiBrnA==;5:dZx/ZW5stQ+yu+Dqx7bC/NIOPn+1mTSemSMN2tO4OuXTKbAZA3fYqOGR1ReVKF9gsOTsoXcRXY/8hULPwcEAHRdeqyIgpSd6IjdwLWYhOwYaUoIVf3hm/ay8NVTzeI9b+6xEzLFfDg8G6qlkeGWd0IspIzvAptn5xJiEKlBhavo=;7:wP5G+OI8Gyk4qwCl2e+VGG8H09n9tYUQY1uvn2wzF09XCDeKwjKlaDMY5RBsQw9LEdxUaya098HKuE516LUodPSxmlqo6WzXjUaT4nClFQZqkgvmCqNrxsbHizkxcVnZNZwo6uTf6PkAPwAXBEWXE7dXgxGvOiPugnvubi6v3b6T54vleG3HXrnSaMD9TX0UxADnjLSUEKfMh7W5k9pKl6xc3wOg8p4JJFq66KPzAhURhjq9ecl3kfD3M/ZUF5x3 x-ms-office365-filtering-correlation-id: f4b3ee5f-20c4-4548-aefd-08d610d51330 x-ms-office365-filtering-ht: Tenant x-microsoft-antispam: BCL:0;PCL:0;RULEID:(7020095)(4652040)(4534165)(4627221)(201703031133081)(201702281549075)(5600074)(711020)(4618075)(2017052603328)(7193020);SRVR:CY4PR21MB0503; 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received-spf: None (protection.outlook.com: microsoft.com does not designate permitted sender hosts) authentication-results: spf=none (sender IP is ) smtp.mailfrom=Alexander.Levin@microsoft.com; x-microsoft-antispam-message-info: 9MsM6U77FhmzrMR01K2i4IL9cvkyNiJcwZRLJwzcd+T0POtSa8CRbwXVZiTeaWn384DKqVMGhjKHbRCvX7lGoGdsclJp+sZbQ8UsYMCT8M2UhmpA+R4uYKmoIeFZLg538TeyTecUaLEvn56MQyWQaLw/Pl/YDcYQEMNWZMSFBI0dt2XQlM8PFazDoLxJo5vVz38BAmmdXpb19rPwlVUzfAw3grA/3fNvw+1BCp464B1iihqISOC1PqO0j77q9eaChBEfIk1avNpTn0FVSzjBxWF7edSlNsKli6dISuNnEKFIz7nTTrnlJvUs+9hjXzyd+CF8K4EYMI49rNwAstZGz5e0j1JLM3KQI1oYeNAMbXs= spamdiagnosticoutput: 1:99 spamdiagnosticmetadata: NSPM Content-Type: text/plain; charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: microsoft.com X-MS-Exchange-CrossTenant-Network-Message-Id: f4b3ee5f-20c4-4548-aefd-08d610d51330 X-MS-Exchange-CrossTenant-originalarrivaltime: 02 Sep 2018 13:07:14.3540 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 72f988bf-86f1-41af-91ab-2d7cd011db47 X-MS-Exchange-Transport-CrossTenantHeadersStamped: CY4PR21MB0503 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Daniel Kurtz [ Upstream commit 8bbed1eef001fdfc0ee9595f64cc4f769d265af4 ] The AMD pinctrl driver demultiplexes GPIO interrupts and fires off their individual handlers. If one of these GPIO irqs is configured as a level interrupt, and its downstream handler is a threaded ONESHOT interrupt, the GPIO interrupt source is masked by handle_level_irq() until the eventual return of the threaded irq handler. During this time the level GPIO interrupt status will still report as high until the actual gpio source is cleared - both in the individual GPIO interrupt status bit (INTERRUPT_STS_OFF) and in its corresponding "WAKE_INT_STATUS_REG" bit. Thus, if another GPIO interrupt occurs during this time, amd_gpio_irq_handler() will see that the (masked-and-not-yet-cleared) level irq is still pending and incorrectly call its handler again. To fix this, have amd_gpio_irq_handler() check for both interrupts status and mask before calling generic_handle_irq(). Note: Is it possible that this bug was the source of the interrupt storm on Ryzen when using chained interrupts before commit ba714a9c1dea85 ("pinctrl/amd: Use regular interrupt instead of chained")? Signed-off-by: Daniel Kurtz Acked-by: Thomas Gleixner Signed-off-by: Linus Walleij Signed-off-by: Sasha Levin --- drivers/pinctrl/pinctrl-amd.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/pinctrl/pinctrl-amd.c b/drivers/pinctrl/pinctrl-amd.c index 433af328d981..b78f42abff2f 100644 --- a/drivers/pinctrl/pinctrl-amd.c +++ b/drivers/pinctrl/pinctrl-amd.c @@ -530,7 +530,8 @@ static irqreturn_t amd_gpio_irq_handler(int irq, void *= dev_id) /* Each status bit covers four pins */ for (i =3D 0; i < 4; i++) { regval =3D readl(regs + i); - if (!(regval & PIN_IRQ_PENDING)) + if (!(regval & PIN_IRQ_PENDING) || + !(regval & BIT(INTERRUPT_MASK_OFF))) continue; irq =3D irq_find_mapping(gc->irqdomain, irqnr + i); generic_handle_irq(irq); --=20 2.17.1