From: Christoph Hellwig <hch@infradead.org>
To: Anup Patel <anup@brainfault.org>
Cc: Christoph Hellwig <hch@infradead.org>,
Thomas Gleixner <tglx@linutronix.de>,
Daniel Lezcano <daniel.lezcano@linaro.org>,
Jason Cooper <jason@lakedaemon.net>,
Marc Zyngier <marc.zyngier@arm.com>,
Palmer Dabbelt <palmer@sifive.com>,
"linux-kernel@vger.kernel.org List"
<linux-kernel@vger.kernel.org>, Atish Patra <atish.patra@wdc.com>,
Albert Ou <aou@eecs.berkeley.edu>,
Palmer Dabbelt <palmer@dabbelt.com>,
linux-riscv@lists.infradead.org
Subject: Re: [PATCH v2 3/5] irqchip: RISC-V Local Interrupt Controller Driver
Date: Mon, 10 Sep 2018 23:22:54 -0700 [thread overview]
Message-ID: <20180911062254.GA23395@infradead.org> (raw)
In-Reply-To: <CAAhSdy2uAqOQohmx_HDgR1MbtWeOdc0MTFxToMK2Ak9-za1evg@mail.gmail.com>
On Tue, Sep 11, 2018 at 09:27:45AM +0530, Anup Patel wrote:
> The list of currently defined RISC-V local interrupts will definitely grow
> based on my experience from ARM/ARM64 world.
>
> Like Thomas mentioned, we will definitely end-up having separate
> irqchip and irq_domain for RISC-V local interrupts for flexibility. Better
> do it now with separate RISC-V INTC driver.
I disagree. Just because arm made a mess of their irq handling there
is no need to repeat mistakes by paving their way. IFF we end up
with a convoluted mess like arm in the end we'll need an irqchip,
and as your series has shown that is fairly easily doable. But I'd
rather spend my effort on it not becoming a mess in the first place
rather than helping the mess.
next prev parent reply other threads:[~2018-09-11 6:23 UTC|newest]
Thread overview: 34+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-09-06 12:36 [PATCH v2 0/5] New " Anup Patel
2018-09-06 12:36 ` [PATCH v2 1/5] RISC-V: self-contained IPI handling routine Anup Patel
2018-09-06 12:36 ` [PATCH v2 2/5] RISC-V: No need to pass scause as arg to do_IRQ() Anup Patel
2018-09-06 12:36 ` [PATCH v2 3/5] irqchip: RISC-V Local Interrupt Controller Driver Anup Patel
2018-09-06 14:06 ` Christoph Hellwig
2018-09-06 14:19 ` Anup Patel
2018-09-08 10:46 ` Thomas Gleixner
2018-09-10 13:29 ` Christoph Hellwig
2018-09-10 13:34 ` Thomas Gleixner
2018-09-10 13:37 ` Thomas Gleixner
2018-09-10 13:39 ` Christoph Hellwig
2018-09-10 13:45 ` Thomas Gleixner
2018-09-10 13:49 ` Christoph Hellwig
2018-09-10 14:29 ` Anup Patel
2018-09-10 16:07 ` Thomas Gleixner
2018-09-10 16:11 ` Christoph Hellwig
2018-09-10 16:35 ` Anup Patel
2018-09-10 16:39 ` Christoph Hellwig
2018-09-10 17:11 ` Anup Patel
2018-09-10 19:37 ` Thomas Gleixner
2018-09-10 22:19 ` Christoph Hellwig
2018-09-11 3:57 ` Anup Patel
2018-09-11 6:22 ` Christoph Hellwig [this message]
2018-09-10 22:16 ` Christoph Hellwig
2018-09-10 16:13 ` Christoph Hellwig
2018-09-10 16:32 ` Anup Patel
2018-09-10 16:35 ` Christoph Hellwig
2018-09-10 16:38 ` Anup Patel
2018-09-17 14:14 ` Christoph Hellwig
2018-09-17 14:28 ` Anup Patel
2018-09-26 5:54 ` Anup Patel
2018-09-26 15:38 ` Palmer Dabbelt
2018-09-06 12:36 ` [PATCH v2 4/5] clocksource: riscv_timer: Make timer interrupt as a per-CPU interrupt Anup Patel
2018-09-06 12:36 ` [PATCH v2 5/5] RISC-V: Remove do_IRQ() function Anup Patel
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