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[80.62.116.106]) by smtp.gmail.com with ESMTPSA id g20-v6sm6830804edm.36.2018.09.25.23.39.48 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 25 Sep 2018 23:39:49 -0700 (PDT) From: Ricardo Ribalda Delgado To: robh@kernel.org, David Woodhouse , Brian Norris , Boris Brezillon , Marek Vasut , Richard Weinberger , Zhouyang Jia , linux-mtd@lists.infradead.org, open list , devicetree@vger.kernel.org Cc: Ricardo Ribalda Delgado Subject: [PATCH v3 8/8] dt-binding: mtd: Document gpio-addr-flash Date: Wed, 26 Sep 2018 08:39:34 +0200 Message-Id: <20180926063934.9229-1-ricardo.ribalda@gmail.com> X-Mailer: git-send-email 2.19.0 In-Reply-To: <20180925204813.GA6450@bogus> References: <20180925204813.GA6450@bogus> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Add documentation for gpio-addr-flash. This binding allow creating flash devices that are paged using GPIOs. Cc: devicetree@vger.kernel.org Signed-off-by: Ricardo Ribalda Delgado --- Changelog v3: - Changes suggested by Rob Herring (Thanks!) - Add gpio description - Improve partition .../bindings/mtd/gpio-addr-flash.txt | 54 +++++++++++++++++++ 1 file changed, 54 insertions(+) create mode 100644 Documentation/devicetree/bindings/mtd/gpio-addr-flash.txt diff --git a/Documentation/devicetree/bindings/mtd/gpio-addr-flash.txt b/Documentation/devicetree/bindings/mtd/gpio-addr-flash.txt new file mode 100644 index 000000000000..5006a26e1753 --- /dev/null +++ b/Documentation/devicetree/bindings/mtd/gpio-addr-flash.txt @@ -0,0 +1,54 @@ +Memory Mapped flash with some address lines addressed using GPIOs + +Handle the case where a flash device is mostly addressed using physical +line and supplemented by GPIOs. This way you can hook up say a 8MiB flash +to a 2MiB memory range and use the GPIOs to select a particular range. + + - compatible : "cfi-gpio-addr-flash" + - reg : Address range of the mtd chip that is memory mapped, this is, + on the previous example 2MiB. + - bank-width : Width (in bytes) of the bank. Equal to the + device width times the number of interleaved chips. + - gpios: List of GPIO specifiers that will be used to address the MSBs address + lines. The order goes from LSB to MSB. + - probe-type : (optional) "cfi_probe", "jedec_probe". How the mtd chip + is going to be probed. If omitted, assumed to be equal to "cfi_probe". + - #address-cells, #size-cells : Must be present if the device has + sub-nodes representing partitions (see below). In this case + both #address-cells and #size-cells must be equal to 1. + +The device tree may optionally contain sub-nodes describing partitions of the +address space. Check partition.txt for more details. + +Example: + + flash@300000 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "cfi-gpio-addr-flash"; + bank-width = <2>; + reg = < 0x00300000 0x00200000 >; + gpios = <&gpio_0 3 0>, <&gpio_0 4 0>; + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + reg = < 0x0 0x200000 >; + label = "Golden Bitstream"; + }; + partition@200000 { + reg = < 0x200000 0x200000 >; + label = "User Bitstream"; + }; + partition@400000 { + reg = < 0x400000 0x200000 >; + label = "V4L Controls"; + }; + partition@600000 { + reg = < 0x600000 0x200000 >; + label = "Production Data"; + }; + } + } ; -- 2.19.0