From: Yasha Cherikovsky <yasha.che3@gmail.com>
To: Ralf Baechle <ralf@linux-mips.org>,
Paul Burton <paul.burton@mips.com>,
James Hogan <jhogan@kernel.org>,
linux-mips@linux-mips.org
Cc: Yasha Cherikovsky <yasha.che3@gmail.com>, linux-kernel@vger.kernel.org
Subject: [PATCH v2 0/1] MIPS: Lexra CPU support, prerequisite patch
Date: Wed, 26 Sep 2018 14:16:14 +0300 [thread overview]
Message-ID: <20180926111615.6780-1-yasha.che3@gmail.com> (raw)
Hi,
This is the v2 of:
https://www.linux-mips.org/archives/linux-mips/2018-09/msg00641.html
Changelog:
v1 -> v2:
- Rebased on v4.19-rc5
- Addressed Paul's comments:
https://www.linux-mips.org/archives/linux-mips/2018-09/msg00735.html
The patch is also available at:
https://github.com/yashac3/linux-rtl8186/commits/unaligned_load_store_on_4_19
Please review.
---
This is a prerequisite patch required for adding Lexra CPU [1] support in
arch/mips.
It does not add any Lexra CPU support yet, but it is required for such future
support.
The patch is written on top of v4.19-rc5.
Background:
I'm currently working on porting Linux/MIPS to run on the Realtek RTL8186 SoC [1],
which has Lexra LX5280 CPU [2].
The complete Lexra+RTL8186 support is still WIP [3] so I'm not sending that
for review right now.
Thanks,
Yasha
[1] https://wikidevi.com/wiki/Realtek_RTL8186
[2] https://www.linux-mips.org/wiki/Lexra
[3] https://github.com/yashac3/linux-rtl8186/commits/rtl8186-porting-for-upstream-4.18
Cc: linux-kernel@vger.kernel.org
Yasha Cherikovsky (1):
MIPS: Add Kconfig variable for CPUs with unaligned load/store
instructions
arch/mips/Kconfig | 35 +++++++++++++++++++++++++--
arch/mips/kernel/unaligned.c | 47 ++++++++++++++++++------------------
arch/mips/lib/memcpy.S | 10 ++++----
arch/mips/lib/memset.S | 12 ++++-----
4 files changed, 67 insertions(+), 37 deletions(-)
--
2.19.0
next reply other threads:[~2018-09-26 11:16 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-09-26 11:16 Yasha Cherikovsky [this message]
2018-09-26 11:16 ` [PATCH v2 1/1] MIPS: Add Kconfig variable for CPUs with unaligned load/store instructions Yasha Cherikovsky
2018-09-26 22:18 ` Paul Burton
2018-09-26 22:31 ` Yasha Cherikovsky
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