From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.9 required=3.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH, MAILING_LIST_MULTI,SIGNED_OFF_BY,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 9A4A5C64EBC for ; Thu, 4 Oct 2018 11:12:48 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 5EF0921479 for ; Thu, 4 Oct 2018 11:12:48 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=ti.com header.i=@ti.com header.b="ffJp54nT" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 5EF0921479 Authentication-Results: mail.kernel.org; dmarc=fail (p=quarantine dis=none) header.from=ti.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727569AbeJDSFc (ORCPT ); Thu, 4 Oct 2018 14:05:32 -0400 Received: from lelv0142.ext.ti.com ([198.47.23.249]:39144 "EHLO lelv0142.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727478AbeJDSFb (ORCPT ); Thu, 4 Oct 2018 14:05:31 -0400 Received: from dflxv15.itg.ti.com ([128.247.5.124]) by lelv0142.ext.ti.com (8.15.2/8.15.2) with ESMTP id w94BCeeb025691; Thu, 4 Oct 2018 06:12:40 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1538651560; bh=MxMyZFl2oAn7vPSYMyFlV+blHCXG48BWlzDDKeDLTxI=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=ffJp54nTVZf0mOlAi/zI/ibMLPzCTmoUNbySeYnsPqqU5wyXyDI6MrHiRDSktJomC V65XliKKLu66460V4QNEF7TpBDf+OUlg/PBWSSAGFgiyjtMjznuRvlOtPcQ0f6SsgX ZRRtaQde4d+GYK0OhTi2sMQchF60MFuXv2UjZEsM= Received: from DLEE102.ent.ti.com (dlee102.ent.ti.com [157.170.170.32]) by dflxv15.itg.ti.com (8.14.3/8.13.8) with ESMTP id w94BCe4I020096; Thu, 4 Oct 2018 06:12:40 -0500 Received: from DLEE105.ent.ti.com (157.170.170.35) by DLEE102.ent.ti.com (157.170.170.32) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1466.3; Thu, 4 Oct 2018 06:12:40 -0500 Received: from dlep33.itg.ti.com (157.170.170.75) by DLEE105.ent.ti.com (157.170.170.35) with Microsoft SMTP Server (version=TLS1_0, cipher=TLS_RSA_WITH_AES_256_CBC_SHA) id 15.1.1466.3 via Frontend Transport; Thu, 4 Oct 2018 06:12:40 -0500 Received: from a0230074-OptiPlex-7010.india.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by dlep33.itg.ti.com (8.14.3/8.13.8) with ESMTP id w94BCSLd027478; Thu, 4 Oct 2018 06:12:38 -0500 From: Faiz Abbas To: , , CC: , , , , , Subject: [PATCH 3/6] dt-bindings: mmc: sdhci-of-arasan: Add new compatible for AM654 MMC PHY Date: Thu, 4 Oct 2018 16:44:48 +0530 Message-ID: <20181004111451.9539-4-faiz_abbas@ti.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20181004111451.9539-1-faiz_abbas@ti.com> References: <20181004111451.9539-1-faiz_abbas@ti.com> MIME-Version: 1.0 Content-Type: text/plain X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Add a new compatible to use the host controller driver with the MMC PHY on TI's AM654 SOCs Signed-off-by: Faiz Abbas Signed-off-by: Sekhar Nori --- Documentation/devicetree/bindings/mmc/arasan,sdhci.txt | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/mmc/arasan,sdhci.txt b/Documentation/devicetree/bindings/mmc/arasan,sdhci.txt index f6ddba31cb73..e2effe17f05e 100644 --- a/Documentation/devicetree/bindings/mmc/arasan,sdhci.txt +++ b/Documentation/devicetree/bindings/mmc/arasan,sdhci.txt @@ -15,6 +15,7 @@ Required Properties: - "arasan,sdhci-5.1": generic Arasan SDHCI 5.1 PHY - "rockchip,rk3399-sdhci-5.1", "arasan,sdhci-5.1": rk3399 eMMC PHY For this device it is strongly suggested to include arasan,soc-ctl-syscon. + - "ti,am654-sdhci-5.1", "arasan,sdhci-5.1": TI AM654 MMC PHY - reg: From mmc bindings: Register location and length. - clocks: From clock bindings: Handles to clock inputs. - clock-names: From clock bindings: Tuple including "clk_xin" and "clk_ahb" -- 2.18.0