From: Kristen Carlson Accardi <kristen@linux.intel.com>
To: unlisted-recipients:; (no To-header on input)
Cc: kernel-hardening@lists.openwall.com,
Thomas Gleixner <tglx@linutronix.de>,
Ingo Molnar <mingo@redhat.com>, Borislav Petkov <bp@alien8.de>,
"H. Peter Anvin" <hpa@zytor.com>,
x86@kernel.org, Andy Lutomirski <luto@kernel.org>,
linux-kernel@vger.kernel.org
Subject: [PATCH] x86: entry: flush the cache if syscall error
Date: Thu, 11 Oct 2018 11:54:58 -0700 [thread overview]
Message-ID: <20181011185458.10186-1-kristen@linux.intel.com> (raw)
This patch aims to make it harder to perform cache timing attacks on data
left behind by system calls. If we have an error returned from a syscall,
flush the L1 cache.
It's important to note that this patch is not addressing any specific
exploit, nor is it intended to be a complete defense against anything.
It is intended to be a low cost way of eliminating some of side effects
of a failed system call.
A performance test using sysbench on one hyperthread and a script which
attempts to repeatedly access files it does not have permission to access
on the other hyperthread found no significant performance impact.
Suggested-by: Alan Cox <alan@linux.intel.com>
Signed-off-by: Kristen Carlson Accardi <kristen@linux.intel.com>
---
arch/x86/Kconfig | 9 +++++++++
arch/x86/entry/common.c | 18 ++++++++++++++++++
2 files changed, 27 insertions(+)
diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig
index 1a0be022f91d..bde978eb3b4e 100644
--- a/arch/x86/Kconfig
+++ b/arch/x86/Kconfig
@@ -445,6 +445,15 @@ config RETPOLINE
code are eliminated. Since this includes the syscall entry path,
it is not entirely pointless.
+config SYSCALL_FLUSH
+ bool "Clear L1 Cache on syscall errors"
+ default n
+ help
+ Selecting 'y' allows the L1 cache to be cleared upon return of
+ an error code from a syscall if the CPU supports "flush_l1d".
+ This may reduce the likelyhood of speculative execution style
+ attacks on syscalls.
+
config INTEL_RDT
bool "Intel Resource Director Technology support"
default n
diff --git a/arch/x86/entry/common.c b/arch/x86/entry/common.c
index 3b2490b81918..26de8ea71293 100644
--- a/arch/x86/entry/common.c
+++ b/arch/x86/entry/common.c
@@ -268,6 +268,20 @@ __visible inline void syscall_return_slowpath(struct pt_regs *regs)
prepare_exit_to_usermode(regs);
}
+__visible inline void l1_cache_flush(struct pt_regs *regs)
+{
+ if (IS_ENABLED(CONFIG_SYSCALL_FLUSH) &&
+ static_cpu_has(X86_FEATURE_FLUSH_L1D)) {
+ if (regs->ax == 0 || regs->ax == -EAGAIN ||
+ regs->ax == -EEXIST || regs->ax == -ENOENT ||
+ regs->ax == -EXDEV || regs->ax == -ETIMEDOUT ||
+ regs->ax == -ENOTCONN || regs->ax == -EINPROGRESS)
+ return;
+
+ wrmsrl(MSR_IA32_FLUSH_CMD, L1D_FLUSH);
+ }
+}
+
#ifdef CONFIG_X86_64
__visible void do_syscall_64(unsigned long nr, struct pt_regs *regs)
{
@@ -290,6 +304,8 @@ __visible void do_syscall_64(unsigned long nr, struct pt_regs *regs)
regs->ax = sys_call_table[nr](regs);
}
+ l1_cache_flush(regs);
+
syscall_return_slowpath(regs);
}
#endif
@@ -338,6 +354,8 @@ static __always_inline void do_syscall_32_irqs_on(struct pt_regs *regs)
#endif /* CONFIG_IA32_EMULATION */
}
+ l1_cache_flush(regs);
+
syscall_return_slowpath(regs);
}
--
2.14.4
next reply other threads:[~2018-10-11 18:55 UTC|newest]
Thread overview: 22+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-10-11 18:54 Kristen Carlson Accardi [this message]
2018-10-11 19:25 ` Andy Lutomirski
2018-10-11 20:15 ` Kristen C Accardi
2018-10-11 20:25 ` Alan Cox
2018-10-11 20:47 ` Andy Lutomirski
2018-10-12 9:20 ` Samuel Neves
2018-10-12 13:25 ` Jann Horn
2018-10-12 14:28 ` Samuel Neves
2018-10-11 20:48 ` Andy Lutomirski
2018-10-11 20:55 ` Kees Cook
2018-10-11 21:17 ` Andy Lutomirski
2018-10-11 22:11 ` Jann Horn
2018-10-12 14:25 ` Alan Cox
2018-10-12 14:43 ` Andy Lutomirski
2018-10-12 15:02 ` Alan Cox
2018-10-12 15:41 ` Jann Horn
2018-10-12 16:07 ` Andy Lutomirski
2018-10-11 21:23 ` Kristen C Accardi
2018-10-11 23:43 ` Thomas Gleixner
2018-10-11 21:42 ` Jann Horn
2018-10-11 23:15 ` Thomas Gleixner
2018-10-11 22:33 ` Thomas Gleixner
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