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received-spf: None (protection.outlook.com: amd.com does not designate permitted sender hosts) x-microsoft-antispam-message-info: 8DzXomX6qP7SwO5f8a6zZe95pMfThy8oUfR9kjZJdyQnY3KylEyMVcFsYO7KoFBGfdjP9MkhYWGWaTrcPnzyCLhMMxj2lu0R0Q1vwFZxSt2oBy8fdihaGFUowem0llD+okiM91DSiTkaNCrccML5n2QH/bGEl4jOhiuUBeFu/dwxQjwK9H2cWvCvb3lBSx7w3Kv9sKYEir/m9pIcLFouR0McagF+nVbdf0lLKGOI9kyGoROfx6gkhY3Ur220mAeR7Gg+HzD0PRnaera3UqCmQoOxeFm9tVtsVqsRXobL1/CiWw5sGRJB/fN1xTzK8u4q1k2nF5w1buLRWG0x28SG5k/g+0MrUkYZUwDS4R2GoNY= spamdiagnosticoutput: 1:99 spamdiagnosticmetadata: NSPM Content-Type: text/plain; charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-Network-Message-Id: 0b66e052-b38d-4034-a86a-08d632e098be X-MS-Exchange-CrossTenant-originalarrivaltime: 15 Oct 2018 20:55:54.0411 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM5PR12MB1850 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Sherry Hurwitz The feature bit X86_FEATURE_MBA is detected via CPUID leaf 0x80000008 EBX Bit 06. This bit indicates the support of AMD's MBA feature. This feature is supported by both Intel and AMD. But they are detected different CPUID leaves. Signed-off-by: Sherry Hurwitz Signed-off-by: Babu Moger Reviewed-by: Borislav Petkov --- arch/x86/kernel/cpu/scattered.c | 7 ++++++- 1 file changed, 6 insertions(+), 1 deletion(-) diff --git a/arch/x86/kernel/cpu/scattered.c b/arch/x86/kernel/cpu/scattere= d.c index 772c219b6889..bd7853334b27 100644 --- a/arch/x86/kernel/cpu/scattered.c +++ b/arch/x86/kernel/cpu/scattered.c @@ -17,7 +17,11 @@ struct cpuid_bit { u32 sub_leaf; }; =20 -/* Please keep the leaf sorted by cpuid_bit.level for faster search. */ +/* + * Please keep the leaf sorted by cpuid_bit.level for faster search. + * X86_FEATURE_MBA supported by both Intel and AMD. But the cpuid + * levels are different. Add a separate enty for each. + */ static const struct cpuid_bit cpuid_bits[] =3D { { X86_FEATURE_APERFMPERF, CPUID_ECX, 0, 0x00000006, 0 }, { X86_FEATURE_EPB, CPUID_ECX, 3, 0x00000006, 0 }, @@ -29,6 +33,7 @@ static const struct cpuid_bit cpuid_bits[] =3D { { X86_FEATURE_HW_PSTATE, CPUID_EDX, 7, 0x80000007, 0 }, { X86_FEATURE_CPB, CPUID_EDX, 9, 0x80000007, 0 }, { X86_FEATURE_PROC_FEEDBACK, CPUID_EDX, 11, 0x80000007, 0 }, + { X86_FEATURE_MBA, CPUID_EBX, 6, 0x80000008, 0 }, { X86_FEATURE_SME, CPUID_EAX, 0, 0x8000001f, 0 }, { X86_FEATURE_SEV, CPUID_EAX, 1, 0x8000001f, 0 }, { 0, 0, 0, 0, 0 } --=20 2.17.1