From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.9 required=3.0 tests=DATE_IN_PAST_12_24, HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI,SIGNED_OFF_BY,SPF_PASS, URIBL_BLOCKED,USER_AGENT_NEOMUTT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 22053ECDE43 for ; Fri, 19 Oct 2018 10:18:40 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id E6DF821470 for ; Fri, 19 Oct 2018 10:18:39 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org E6DF821470 Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=bootlin.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727303AbeJSSYE convert rfc822-to-8bit (ORCPT ); Fri, 19 Oct 2018 14:24:04 -0400 Received: from mail.bootlin.com ([62.4.15.54]:59213 "EHLO mail.bootlin.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726690AbeJSSYD (ORCPT ); Fri, 19 Oct 2018 14:24:03 -0400 Received: by mail.bootlin.com (Postfix, from userid 110) id BB44720DFF; Fri, 19 Oct 2018 12:18:35 +0200 (CEST) Received: from localhost (aaubervilliers-681-1-25-52.w90-88.abo.wanadoo.fr [90.88.145.52]) by mail.bootlin.com (Postfix) with ESMTPSA id 8C6C0209DA; Fri, 19 Oct 2018 12:18:25 +0200 (CEST) Date: Thu, 18 Oct 2018 18:58:08 +0200 From: Maxime Ripard To: Icenowy Zheng Cc: Chen-Yu Tsai , linux-arm-kernel@lists.infradead.org, linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org, linux-sunxi@googlegroups.com Subject: Re: [PATCH v2] clk: sunxi-ng: enable so-said LDOs for A64 SoC's pll-mipi clock Message-ID: <20181018165808.f23gfkwlgskzdbfy@flea> References: <20181018070729.52943-1-icenowy@aosc.io> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline Content-Transfer-Encoding: 8BIT In-Reply-To: <20181018070729.52943-1-icenowy@aosc.io> User-Agent: NeoMutt/20180716 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Thu, Oct 18, 2018 at 03:07:29PM +0800, Icenowy Zheng wrote: > In the user manual of A64 SoC, the bit 22 and 23 of pll-mipi control > register is called "LDO{1,2}_EN", and according to the BSP source code > from Allwinner , the LDOs are enabled during the clock's enabling > process. > > The clock failed to generate output if the two LDOs are not enabled. > > Add the two bits to the clock's gate bits, so that the LDOs are enabled > when the PLL is enabled. > > Fixes: c6a0637460c2 ("clk: sunxi-ng: Add A64 clocks") > Signed-off-by: Icenowy Zheng Queued for 4.21, thanks! Maxime -- Maxime Ripard, Bootlin Embedded Linux and Kernel engineering https://bootlin.com