From: "Z.q. Hou" <zhiqiang.hou@nxp.com>
To: "linux-pci@vger.kernel.org" <linux-pci@vger.kernel.org>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
"bhelgaas@google.com" <bhelgaas@google.com>,
"lorenzo.pieralisi@arm.com" <lorenzo.pieralisi@arm.com>,
"jingoohan1@gmail.com" <jingoohan1@gmail.com>,
"gustavo.pimentel@synopsys.com" <gustavo.pimentel@synopsys.com>
Cc: Roy Zang <roy.zang@nxp.com>, Mingkai Hu <mingkai.hu@nxp.com>,
"M.h. Lian" <minghuan.lian@nxp.com>,
"Z.q. Hou" <zhiqiang.hou@nxp.com>
Subject: [PATCH 0/4] PCI/dwc: Add more than 4GiB range support
Date: Thu, 25 Oct 2018 09:22:31 +0000 [thread overview]
Message-ID: <20181025092229.28413-1-Zhiqiang.Hou@nxp.com> (raw)
From: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
This patch set is to add greater than 4GiB range support, patch 4/4.
Patch 3/4 is to initialize the number of viewport.
BTW, fix 2 bugs, see patch 1/4 and 2/4.
Hou Zhiqiang (4):
PCI/dwc: fix potential memory leak
PCI/dwc: Fix the 4GiB outbound window size truncated to zero issue
PCI/layerscape: initialize the number of viewport
PCI/dwc: Add more than 4GiB range support
drivers/pci/controller/dwc/pci-layerscape.c | 3 +
.../pci/controller/dwc/pcie-designware-host.c | 83 +++++++++++++++----
drivers/pci/controller/dwc/pcie-designware.c | 4 +-
drivers/pci/controller/dwc/pcie-designware.h | 7 +-
4 files changed, 79 insertions(+), 18 deletions(-)
--
2.17.1
next reply other threads:[~2018-10-25 9:22 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-10-25 9:22 Z.q. Hou [this message]
2018-10-25 9:22 ` [PATCH 1/4] PCI/dwc: fix potential memory leak Z.q. Hou
2018-11-05 12:18 ` Gustavo Pimentel
2018-10-25 9:22 ` [PATCH 2/4] PCI/dwc: Fix the 4GiB outbound window size truncated to zero issue Z.q. Hou
2018-11-05 12:25 ` Gustavo Pimentel
2018-10-25 9:22 ` [PATCH 3/4] PCI/layerscape: initialize the number of viewport Z.q. Hou
2018-10-25 9:22 ` [PATCH 4/4] PCI/dwc: Add more than 4GiB range support Z.q. Hou
2018-10-25 11:31 ` kbuild test robot
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