From: Peter Zijlstra <peterz@infradead.org>
To: Chris Wilson <chris@chris-wilson.co.uk>
Cc: x86@kernel.org, linux-kernel@vger.kernel.org, tglx@linutronix.de,
bp@alien8.de, hpa@zytor.com,
Petri Latvala <petri.latvala@intel.com>,
Ingo Molnar <mingo@redhat.com>,
Arnaldo Carvalho de Melo <acme@kernel.org>,
Alexander Shishkin <alexander.shishkin@linux.intel.com>,
Jiri Olsa <jolsa@redhat.com>, Namhyung Kim <namhyung@kernel.org>
Subject: Re: [PATCH] perf/x86: Bump INTEL_PMC_MAX_FIXED for Icelake
Date: Tue, 20 Nov 2018 13:50:40 +0100 [thread overview]
Message-ID: <20181120125040.GN2131@hirez.programming.kicks-ass.net> (raw)
In-Reply-To: <20181114142518.15380-1-chris@chris-wilson.co.uk>
On Wed, Nov 14, 2018 at 02:25:18PM +0000, Chris Wilson wrote:
> I am not aware of what the consequences are of bumping this limit, so
> please take the patch with a pinch of salt and more of a heads up!
Yeah, this will only make your warning go away, but is not suitable for
upstream. The upstream icelake enablement would be a much larger patch
that actually enables the new PMU features.
So I suggest you carry this in your CI tree until the icelake patches
are allowed to go public.
> diff --git a/arch/x86/include/asm/perf_event.h b/arch/x86/include/asm/perf_event.h
> index 8bdf74902293..ab4cf7c12c40 100644
> --- a/arch/x86/include/asm/perf_event.h
> +++ b/arch/x86/include/asm/perf_event.h
> @@ -7,7 +7,7 @@
> */
>
> #define INTEL_PMC_MAX_GENERIC 32
> -#define INTEL_PMC_MAX_FIXED 3
> +#define INTEL_PMC_MAX_FIXED 4
> #define INTEL_PMC_IDX_FIXED 32
>
> #define X86_PMC_IDX_MAX 64
> --
> 2.19.1
>
prev parent reply other threads:[~2018-11-20 12:51 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-11-14 14:25 Chris Wilson
2018-11-20 12:50 ` Peter Zijlstra [this message]
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