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From: Borislav Petkov <bp@alien8.de>
To: Victoria Anosova <v.s.anosova@gmail.com>
Cc: sashal@kernel.org, bigeasy@linutronix.de, x86@kernel.org,
	mingo@kernel.org, linux-kernel@vger.kernel.org,
	stable@vger.kernel.org
Subject: Re: [PATCH v2] x86/fpu: Disable BH while while loading FPU registers in __fpu__restore_sig()
Date: Wed, 21 Nov 2018 11:56:49 +0100	[thread overview]
Message-ID: <20181121105649.GB27797@zn.tnic> (raw)
In-Reply-To: <CAMU5Q=72mNG4ikXKpLK3=SiDK3dRXtCw7wpHZ2i==awrtvRwdg@mail.gmail.com>

On Wed, Nov 21, 2018 at 11:11:18AM +0500, Victoria Anosova wrote:
> Glad this come to kernel. We've already applied this patch.

The current version, with the bottom half toggling or the original one
with preempt_disable/enable?

-- 
Regards/Gruss,
    Boris.

Good mailing practices for 400: avoid top-posting and trim the reply.

  parent reply	other threads:[~2018-11-21 10:56 UTC|newest]

Thread overview: 17+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-11-19 16:04 Sebastian Andrzej Siewior
2018-11-19 17:02 ` Dave Hansen
2018-11-19 17:11   ` Sebastian Andrzej Siewior
2018-11-19 17:27     ` Borislav Petkov
2018-11-19 17:31       ` Sebastian Andrzej Siewior
2018-11-19 17:41         ` Borislav Petkov
2018-11-19 17:32       ` Dave Hansen
2018-11-19 18:10 ` Borislav Petkov
2018-11-20 10:26   ` [PATCH v3] " Sebastian Andrzej Siewior
     [not found] ` <20181120132531.6E80C206BB@mail.kernel.org>
2018-11-20 18:34   ` [PATCH v2] " Borislav Petkov
     [not found]     ` <CAMU5Q=72mNG4ikXKpLK3=SiDK3dRXtCw7wpHZ2i==awrtvRwdg@mail.gmail.com>
2018-11-21 10:56       ` Borislav Petkov [this message]
     [not found]         ` <CAMU5Q=5LkypghWA=23YwscaXSx5yBv7LyW1WHbY_J_hQwryNpA@mail.gmail.com>
2018-11-21 12:54           ` Boris Petkov
     [not found] <87d1rk9str.fsf@yhuang-dev.intel.com>
2016-02-26  7:49 ` [lkp] [x86/fpu] 58122bf1d8: WARNING: CPU: 0 PID: 1 at arch/x86/include/asm/fpu/internal.h:529 fpu__restore+0x28f/0x9ab() Borislav Petkov
2016-02-27 12:02   ` Ingo Molnar
2016-02-27 13:13     ` Borislav Petkov
2018-11-20 12:05   ` [tip:x86/urgent] x86/fpu: Disable bottom halves while loading FPU registers tip-bot for Sebastian Andrzej Siewior
2018-11-20 16:29   ` tip-bot for Sebastian Andrzej Siewior

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