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From: kbuild test robot <lkp@intel.com>
To: Christophe Leroy <christophe.leroy@c-s.fr>
Cc: kbuild-all@01.org,
	Benjamin Herrenschmidt <benh@kernel.crashing.org>,
	Paul Mackerras <paulus@samba.org>,
	Michael Ellerman <mpe@ellerman.id.au>,
	linux-kernel@vger.kernel.org, linuxppc-dev@lists.ozlabs.org
Subject: Re: [PATCH v8 17/20] powerpc/8xx: Enable 512k hugepage support with HW assistance
Date: Fri, 30 Nov 2018 03:07:04 +0800	[thread overview]
Message-ID: <201811300300.LFk7hauH%fengguang.wu@intel.com> (raw)
In-Reply-To: <00b47f8f30643550d38d21a7180cf3c8d918a012.1543478200.git.christophe.leroy@c-s.fr>

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Hi Christophe,

Thank you for the patch! Yet something to improve:

[auto build test ERROR on powerpc/next]
[also build test ERROR on v4.20-rc4]
[cannot apply to next-20181129]
[if your patch is applied to the wrong git tree, please drop us a note to help improve the system]

url:    https://github.com/0day-ci/linux/commits/Christophe-Leroy/powerpc-book3s32-Remove-CONFIG_BOOKE-dependent-code/20181129-210058
base:   https://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux.git next
config: powerpc-defconfig (attached as .config)
compiler: powerpc64-linux-gnu-gcc (Debian 7.2.0-11) 7.2.0
reproduce:
        wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
        chmod +x ~/bin/make.cross
        # save the attached .config to linux build tree
        GCC_VERSION=7.2.0 make.cross ARCH=powerpc 

All errors (new ones prefixed by >>):

   In file included from arch/powerpc/include/asm/book3s/64/mmu-hash.h:24:0,
                    from arch/powerpc/include/asm/book3s/64/mmu.h:39,
                    from arch/powerpc/include/asm/mmu.h:328,
                    from arch/powerpc/include/asm/lppaca.h:36,
                    from arch/powerpc/include/asm/paca.h:21,
                    from arch/powerpc/include/asm/hw_irq.h:64,
                    from arch/powerpc/include/asm/irqflags.h:12,
                    from include/linux/irqflags.h:16,
                    from include/linux/spinlock.h:54,
                    from include/linux/mmzone.h:8,
                    from include/linux/gfp.h:6,
                    from include/linux/mm.h:10,
                    from arch/powerpc//mm/hugetlbpage.c:11:
   arch/powerpc/include/asm/book3s/64/pgtable.h:219:21: error: "__pte_frag_nr" is not defined, evaluates to 0 [-Werror=undef]
    #define PTE_FRAG_NR __pte_frag_nr
                        ^
   arch/powerpc/include/asm/pgtable.h:123:5: note: in expansion of macro 'PTE_FRAG_NR'
    #if PTE_FRAG_NR != 1
        ^~~~~~~~~~~
   In file included from arch/powerpc/include/asm/book3s/pgalloc.h:10:0,
                    from arch/powerpc/include/asm/pgalloc.h:24,
                    from arch/powerpc//mm/hugetlbpage.c:23:
   arch/powerpc//mm/hugetlbpage.c: In function '__hugepte_alloc':
>> arch/powerpc//mm/hugetlbpage.c:69:22: error: 'PTE_SHIFT' undeclared (first use in this function); did you mean 'PUD_SHIFT'?
      cachep = PGT_CACHE(PTE_SHIFT);
                         ^
   arch/powerpc/include/asm/book3s/64/pgalloc.h:40:40: note: in definition of macro 'PGT_CACHE'
    #define PGT_CACHE(shift) pgtable_cache[shift]
                                           ^~~~~
   arch/powerpc//mm/hugetlbpage.c:69:22: note: each undeclared identifier is reported only once for each function it appears in
      cachep = PGT_CACHE(PTE_SHIFT);
                         ^
   arch/powerpc/include/asm/book3s/64/pgalloc.h:40:40: note: in definition of macro 'PGT_CACHE'
    #define PGT_CACHE(shift) pgtable_cache[shift]
                                           ^~~~~
   arch/powerpc//mm/hugetlbpage.c: In function 'free_hugepd_range':
   arch/powerpc//mm/hugetlbpage.c:339:29: error: 'PTE_SHIFT' undeclared (first use in this function); did you mean 'PUD_SHIFT'?
         get_hugepd_cache_index(PTE_SHIFT));
                                ^~~~~~~~~
                                PUD_SHIFT
   arch/powerpc//mm/hugetlbpage.c: In function 'hugetlbpage_init':
   arch/powerpc//mm/hugetlbpage.c:710:22: error: 'PTE_SHIFT' undeclared (first use in this function); did you mean 'PUD_SHIFT'?
       pgtable_cache_add(PTE_SHIFT);
                         ^~~~~~~~~
                         PUD_SHIFT
   cc1: all warnings being treated as errors

vim +69 arch/powerpc//mm/hugetlbpage.c

  > 23	#include <asm/pgalloc.h>
    24	#include <asm/tlb.h>
    25	#include <asm/setup.h>
    26	#include <asm/hugetlb.h>
    27	#include <asm/pte-walk.h>
    28	
    29	
    30	#ifdef CONFIG_HUGETLB_PAGE
    31	
    32	#define PAGE_SHIFT_64K	16
    33	#define PAGE_SHIFT_512K	19
    34	#define PAGE_SHIFT_8M	23
    35	#define PAGE_SHIFT_16M	24
    36	#define PAGE_SHIFT_16G	34
    37	
    38	bool hugetlb_disabled = false;
    39	
    40	unsigned int HPAGE_SHIFT;
    41	EXPORT_SYMBOL(HPAGE_SHIFT);
    42	
    43	#define hugepd_none(hpd)	(hpd_val(hpd) == 0)
    44	
    45	#define PTE_T_ORDER	(__builtin_ffs(sizeof(pte_t)) - __builtin_ffs(sizeof(void *)))
    46	
    47	pte_t *huge_pte_offset(struct mm_struct *mm, unsigned long addr, unsigned long sz)
    48	{
    49		/*
    50		 * Only called for hugetlbfs pages, hence can ignore THP and the
    51		 * irq disabled walk.
    52		 */
    53		return __find_linux_pte(mm->pgd, addr, NULL, NULL);
    54	}
    55	
    56	static int __hugepte_alloc(struct mm_struct *mm, hugepd_t *hpdp,
    57				   unsigned long address, unsigned int pdshift,
    58				   unsigned int pshift, spinlock_t *ptl)
    59	{
    60		struct kmem_cache *cachep;
    61		pte_t *new;
    62		int i;
    63		int num_hugepd;
    64	
    65		if (pshift >= pdshift) {
    66			cachep = PGT_CACHE(PTE_T_ORDER);
    67			num_hugepd = 1 << (pshift - pdshift);
    68		} else if (IS_ENABLED(CONFIG_PPC_8xx)) {
  > 69			cachep = PGT_CACHE(PTE_SHIFT);
    70			num_hugepd = 1;
    71		} else {
    72			cachep = PGT_CACHE(pdshift - pshift);
    73			num_hugepd = 1;
    74		}
    75	
    76		new = kmem_cache_alloc(cachep, pgtable_gfp_flags(mm, GFP_KERNEL));
    77	
    78		BUG_ON(pshift > HUGEPD_SHIFT_MASK);
    79		BUG_ON((unsigned long)new & HUGEPD_SHIFT_MASK);
    80	
    81		if (! new)
    82			return -ENOMEM;
    83	
    84		/*
    85		 * Make sure other cpus find the hugepd set only after a
    86		 * properly initialized page table is visible to them.
    87		 * For more details look for comment in __pte_alloc().
    88		 */
    89		smp_wmb();
    90	
    91		spin_lock(ptl);
    92		/*
    93		 * We have multiple higher-level entries that point to the same
    94		 * actual pte location.  Fill in each as we go and backtrack on error.
    95		 * We need all of these so the DTLB pgtable walk code can find the
    96		 * right higher-level entry without knowing if it's a hugepage or not.
    97		 */
    98		for (i = 0; i < num_hugepd; i++, hpdp++) {
    99			if (unlikely(!hugepd_none(*hpdp)))
   100				break;
   101			else {
   102	#ifdef CONFIG_PPC_BOOK3S_64
   103				*hpdp = __hugepd(__pa(new) | HUGEPD_VAL_BITS |
   104						 (shift_to_mmu_psize(pshift) << 2));
   105	#elif defined(CONFIG_PPC_8xx)
   106				*hpdp = __hugepd(__pa(new) | _PMD_USER |
   107						 (pshift == PAGE_SHIFT_8M ? _PMD_PAGE_8M :
   108						  _PMD_PAGE_512K) | _PMD_PRESENT);
   109	#else
   110				/* We use the old format for PPC_FSL_BOOK3E */
   111				*hpdp = __hugepd(((unsigned long)new & ~PD_HUGE) | pshift);
   112	#endif
   113			}
   114		}
   115		/* If we bailed from the for loop early, an error occurred, clean up */
   116		if (i < num_hugepd) {
   117			for (i = i - 1 ; i >= 0; i--, hpdp--)
   118				*hpdp = __hugepd(0);
   119			kmem_cache_free(cachep, new);
   120		} else {
   121			kmemleak_ignore(new);
   122		}
   123		spin_unlock(ptl);
   124		return 0;
   125	}
   126	

---
0-DAY kernel test infrastructure                Open Source Technology Center
https://lists.01.org/pipermail/kbuild-all                   Intel Corporation

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  reply	other threads:[~2018-11-29 19:07 UTC|newest]

Thread overview: 23+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-11-29  8:10 [PATCH v8 00/20] Implement use of HW assistance on TLB table walk on 8xx Christophe Leroy
2018-11-29  8:10 ` [PATCH v8 01/20] powerpc/book3s32: Remove CONFIG_BOOKE dependent code Christophe Leroy
2018-11-29  8:10 ` [PATCH v8 02/20] powerpc/8xx: Remove PTE_ATOMIC_UPDATES Christophe Leroy
2018-11-29  8:10 ` [PATCH v8 03/20] powerpc/mm: Move pte_fragment_alloc() to a common location Christophe Leroy
2018-11-29  8:10 ` [PATCH v8 04/20] powerpc/mm: Avoid useless lock with single page fragments Christophe Leroy
2018-11-29  8:10 ` [PATCH v8 05/20] powerpc/mm: move platform specific mmu-xxx.h in platform directories Christophe Leroy
2018-11-29  8:10 ` [PATCH v8 06/20] powerpc/mm: Move pgtable_t into platform headers Christophe Leroy
2018-11-29  8:10 ` [PATCH v8 07/20] powerpc/mm: add helpers to get/set mm.context->pte_frag Christophe Leroy
2018-11-29 18:26   ` kbuild test robot
2018-11-29  8:10 ` [PATCH v8 08/20] powerpc/mm: Extend pte_fragment functionality to PPC32 Christophe Leroy
2018-11-29  8:10 ` [PATCH v8 09/20] powerpc/mm: enable the use of page table cache of order 0 Christophe Leroy
2018-11-29  8:10 ` [PATCH v8 10/20] powerpc/mm: replace hugetlb_cache by PGT_CACHE(PTE_T_ORDER) Christophe Leroy
2018-11-29  8:10 ` [PATCH v8 11/20] powerpc/mm: fix a warning when a cache is common to PGD and hugepages Christophe Leroy
2018-11-29  8:10 ` [PATCH v8 12/20] powerpc/mm: remove unnecessary test in pgtable_cache_init() Christophe Leroy
2018-11-29  8:10 ` [PATCH v8 13/20] powerpc/8xx: Move SW perf counters in first 32kb of memory Christophe Leroy
2018-11-29  8:10 ` [PATCH v8 14/20] powerpc/8xx: Temporarily disable 16k pages and hugepages Christophe Leroy
2018-11-29  8:10 ` [PATCH v8 15/20] powerpc/8xx: Use hardware assistance in TLB handlers Christophe Leroy
2018-11-29  8:10 ` [PATCH v8 16/20] powerpc/8xx: Enable 8M hugepage support with HW assistance Christophe Leroy
2018-11-29  8:10 ` [PATCH v8 17/20] powerpc/8xx: Enable 512k " Christophe Leroy
2018-11-29 19:07   ` kbuild test robot [this message]
2018-11-29  8:10 ` [PATCH v8 18/20] powerpc/8xx: reintroduce 16K pages " Christophe Leroy
2018-11-29  8:10 ` [PATCH v8 19/20] powerpc/8xx: don't use r12/SPRN_SPRG_SCRATCH2 in TLB Miss handlers Christophe Leroy
2018-11-29  8:10 ` [PATCH v8 20/20] powerpc/8xx: regroup TLB handler routines Christophe Leroy

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