From: Andrea Parri <andrea.parri@amarulasolutions.com>
To: linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org
Cc: Andrea Parri <andrea.parri@amarulasolutions.com>,
Palmer Dabbelt <palmer@sifive.com>,
Albert Ou <aou@eecs.berkeley.edu>,
Will Deacon <will.deacon@arm.com>,
Peter Zijlstra <peterz@infradead.org>,
Boqun Feng <boqun.feng@gmail.com>
Subject: [PATCH] riscv, atomic: Add #define's for the atomic_{cmp,}xchg_*() variants
Date: Sat, 1 Dec 2018 01:01:56 +0100 [thread overview]
Message-ID: <20181201000156.5366-1-andrea.parri@amarulasolutions.com> (raw)
If an architecture does not define the atomic_{cmp,}xchg_*() variants,
the generic implementation defaults them to the fully-ordered version.
riscv's had its own variants since "the beginning", but it never told
(#define-d these for) the generic implementation: it is time to do so.
Signed-off-by: Andrea Parri <andrea.parri@amarulasolutions.com>
Cc: Palmer Dabbelt <palmer@sifive.com>
Cc: Albert Ou <aou@eecs.berkeley.edu>
Cc: Will Deacon <will.deacon@arm.com>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Boqun Feng <boqun.feng@gmail.com>
---
TBH, the delay was not intentional: I've just become aware of it while
working on moving riscv over to queued rwlocks. There's currently one
callsite for the non-fully-ordered variants mentioned above for riscv:
for atomic_cmpxchg_acquire() in kernel/sched/rt.c:rto_start_trylock(),
[before]
51a: 100726af lr.w a3,(a4)
51e: 00069763 bnez a3,52c <.L1\x027>
522: 1af7262f sc.w.rl a2,a5,(a4)
526: fa75 bnez a2,51a <.L\x021>
528: 0330000f fence rw,rw
[after]
51a: 100726af lr.w a3,(a4)
51e: 00069763 bnez a3,52c <.L1\x027>
522: 18f7262f sc.w a2,a5,(a4)
526: fa75 bnez a2,51a <.L\x021>
528: 0230000f fence r,rw
---
arch/riscv/include/asm/atomic.h | 9 +++++++++
1 file changed, 9 insertions(+)
diff --git a/arch/riscv/include/asm/atomic.h b/arch/riscv/include/asm/atomic.h
index c452359c9cb8a..93826771b616a 100644
--- a/arch/riscv/include/asm/atomic.h
+++ b/arch/riscv/include/asm/atomic.h
@@ -303,6 +303,15 @@ c_t atomic##prefix##_cmpxchg(atomic##prefix##_t *v, c_t o, c_t n) \
ATOMIC_OPS()
+#define atomic_xchg_relaxed atomic_xchg_relaxed
+#define atomic_xchg_acquire atomic_xchg_acquire
+#define atomic_xchg_release atomic_xchg_release
+#define atomic_xchg atomic_xchg
+#define atomic_cmpxchg_relaxed atomic_cmpxchg_relaxed
+#define atomic_cmpxchg_acquire atomic_cmpxchg_acquire
+#define atomic_cmpxchg_release atomic_cmpxchg_release
+#define atomic_cmpxchg atomic_cmpxchg
+
#undef ATOMIC_OPS
#undef ATOMIC_OP
--
2.17.1
next reply other threads:[~2018-12-01 0:02 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-12-01 0:01 Andrea Parri [this message]
2018-12-01 10:23 ` Peter Zijlstra
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20181201000156.5366-1-andrea.parri@amarulasolutions.com \
--to=andrea.parri@amarulasolutions.com \
--cc=aou@eecs.berkeley.edu \
--cc=boqun.feng@gmail.com \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-riscv@lists.infradead.org \
--cc=palmer@sifive.com \
--cc=peterz@infradead.org \
--cc=will.deacon@arm.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox
all inboxes | Powered by JetHome®