From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.0 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY,SPF_PASS,URIBL_BLOCKED, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id A81CCC04EBF for ; Wed, 5 Dec 2018 09:26:55 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 6E4AC206B7 for ; Wed, 5 Dec 2018 09:26:55 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 6E4AC206B7 Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=bootlin.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727548AbeLEJ0y (ORCPT ); Wed, 5 Dec 2018 04:26:54 -0500 Received: from mail.bootlin.com ([62.4.15.54]:39753 "EHLO mail.bootlin.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726918AbeLEJZQ (ORCPT ); Wed, 5 Dec 2018 04:25:16 -0500 Received: by mail.bootlin.com (Postfix, from userid 110) id EBE0620A60; Wed, 5 Dec 2018 10:25:13 +0100 (CET) Received: from localhost.localdomain (aaubervilliers-681-1-79-44.w90-88.abo.wanadoo.fr [90.88.21.44]) by mail.bootlin.com (Postfix) with ESMTPSA id 8F45820510; Wed, 5 Dec 2018 10:25:03 +0100 (CET) From: Paul Kocialkowski To: linux-media@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, devel@driverdev.osuosl.org Cc: Mauro Carvalho Chehab , Rob Herring , Mark Rutland , Maxime Ripard , Chen-Yu Tsai , Paul Kocialkowski , Thomas Petazzoni , linux-sunxi@googlegroups.com, Hans Verkuil , Sakari Ailus Subject: [PATCH v2 01/15] ARM: dts: sun8i: h3: Fix the system-control register range Date: Wed, 5 Dec 2018 10:24:30 +0100 Message-Id: <20181205092444.29497-2-paul.kocialkowski@bootlin.com> X-Mailer: git-send-email 2.19.2 In-Reply-To: <20181205092444.29497-1-paul.kocialkowski@bootlin.com> References: <20181205092444.29497-1-paul.kocialkowski@bootlin.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Unlike in previous generations, the system-control register range is not limited to a size of 0x30 on the H3. In particular, the EMAC clock configuration register (accessed through syscon) is at offset 0x30 in that range. Extend the register size to its full range (0x1000) as a result. Signed-off-by: Paul Kocialkowski Acked-by: Chen-Yu Tsai --- arch/arm/boot/dts/sun8i-h3.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/boot/dts/sun8i-h3.dtsi b/arch/arm/boot/dts/sun8i-h3.dtsi index c2da3a3d373a..dbb7e71b6d69 100644 --- a/arch/arm/boot/dts/sun8i-h3.dtsi +++ b/arch/arm/boot/dts/sun8i-h3.dtsi @@ -136,7 +136,7 @@ soc { system-control@1c00000 { compatible = "allwinner,sun8i-h3-system-control"; - reg = <0x01c00000 0x30>; + reg = <0x01c00000 0x1000>; #address-cells = <1>; #size-cells = <1>; ranges; -- 2.19.2