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From: Boris Brezillon <boris.brezillon@bootlin.com>
To: Tudor.Ambarus@microchip.com, marek.vasut@gmail.com,
	dwmw2@infradead.org, computersforpeace@gmail.com,
	boris.brezillon@bootlin.com, richard@nod.at,
	Cyrille.Pitchen@microchip.com
Cc: linux-mtd@lists.infradead.org, linux-kernel@vger.kernel.org
Subject: Re: [v2] mtd: spi-nor: parse SFDP 4-byte Address Instruction Table
Date: Sat,  8 Dec 2018 13:30:35 +0100	[thread overview]
Message-ID: <20181208123035.9924-1-boris.brezillon@bootlin.com> (raw)
In-Reply-To: <20181206144330.30860-1-tudor.ambarus@microchip.com>

On Thu, 2018-12-06 at 14:43:39 UTC,  wrote:
> From: Cyrille Pitchen <cyrille.pitchen@microchip.com>
> 
> Add support for SFDP (JESD216B) 4-byte Address Instruction Table. This
> table is optional but when available, we parse it to get the 4-byte
> address op codes supported by the memory.
> Using these op codes is stateless as opposed to entering the 4-byte
> address mode or setting the Base Address Register (BAR).
> 
> Flashes that have the 4BAIT table declared can now support
> SPINOR_OP_PP_1_1_4_4B and SPINOR_OP_PP_1_4_4_4B opcodes.
> 
> Tested on MX25L25673G.
> 
> Signed-off-by: Cyrille Pitchen <cyrille.pitchen@microchip.com>
> [tudor.ambarus@microchip.com:
> - rework erase and page program logic,
> - pass DMA-able buffer to spi_nor_read_sfdp(),
> - introduce SPI_NOR_HAS_4BAIT
> - various minor updates.]
> Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>

Applied to http://git.infradead.org/linux-mtd.git spi-nor/next, thanks.

Boris

      parent reply	other threads:[~2018-12-08 12:30 UTC|newest]

Thread overview: 3+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-12-06 14:43 [PATCH v2] " Tudor.Ambarus
2018-12-07  9:00 ` Boris Brezillon
2018-12-08 12:30 ` Boris Brezillon [this message]

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