From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.0 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY,SPF_PASS,URIBL_BLOCKED, USER_AGENT_NEOMUTT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 3F460C43387 for ; Wed, 19 Dec 2018 08:37:04 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 1B04B21871 for ; Wed, 19 Dec 2018 08:37:04 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728467AbeLSIhD (ORCPT ); Wed, 19 Dec 2018 03:37:03 -0500 Received: from metis.ext.pengutronix.de ([85.220.165.71]:54095 "EHLO metis.ext.pengutronix.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727999AbeLSIhC (ORCPT ); Wed, 19 Dec 2018 03:37:02 -0500 Received: from ptx.hi.pengutronix.de ([2001:67c:670:100:1d::c0]) by metis.ext.pengutronix.de with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.89) (envelope-from ) id 1gZXLO-00017y-UF; Wed, 19 Dec 2018 09:36:42 +0100 Received: from ukl by ptx.hi.pengutronix.de with local (Exim 4.89) (envelope-from ) id 1gZXLN-000828-1D; Wed, 19 Dec 2018 09:36:41 +0100 Date: Wed, 19 Dec 2018 09:36:40 +0100 From: Uwe =?iso-8859-1?Q?Kleine-K=F6nig?= To: Anson Huang Cc: "shawnguo@kernel.org" , "s.hauer@pengutronix.de" , "kernel@pengutronix.de" , Fabio Estevam , "robh+dt@kernel.org" , "mark.rutland@arm.com" , "linux-arm-kernel@lists.infradead.org" , "devicetree@vger.kernel.org" , "linux-kernel@vger.kernel.org" , dl-linux-imx , linux-pwm@vger.kernel.org Subject: Re: [PATCH] ARM: dts: imx6sl: correct PWM ipg clock source Message-ID: <20181219083640.42jmibqzn2t3i4t2@pengutronix.de> References: <1545197799-9082-1-git-send-email-Anson.Huang@nxp.com> MIME-Version: 1.0 Content-Type: text/plain; charset=iso-8859-1 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: <1545197799-9082-1-git-send-email-Anson.Huang@nxp.com> User-Agent: NeoMutt/20170113 (1.7.2) X-SA-Exim-Connect-IP: 2001:67c:670:100:1d::c0 X-SA-Exim-Mail-From: ukl@pengutronix.de X-SA-Exim-Scanned: No (on metis.ext.pengutronix.de); SAEximRunCond expanded to false X-PTX-Original-Recipient: linux-kernel@vger.kernel.org Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org [Cc: += linux-pwm] Hello, On Wed, Dec 19, 2018 at 05:41:31AM +0000, Anson Huang wrote: > From i.MX6SL Reference Manual, the PWMx's ipg clock > for registers access is from perclk, correct them. I assume this is related to the patch "pwm: imx: add ipg clock operation"? This patch doesn't fix a real problem because in practise perclk is already enabled, right? (I don't question the patch, just wonder how urgent it is.) > Signed-off-by: Anson Huang > --- > arch/arm/boot/dts/imx6sl.dtsi | 8 ++++---- > 1 file changed, 4 insertions(+), 4 deletions(-) > > diff --git a/arch/arm/boot/dts/imx6sl.dtsi b/arch/arm/boot/dts/imx6sl.dtsi > index e7524e7..4b4813f 100644 > --- a/arch/arm/boot/dts/imx6sl.dtsi > +++ b/arch/arm/boot/dts/imx6sl.dtsi > @@ -338,7 +338,7 @@ > compatible = "fsl,imx6sl-pwm", "fsl,imx27-pwm"; > reg = <0x02080000 0x4000>; > interrupts = <0 83 IRQ_TYPE_LEVEL_HIGH>; > - clocks = <&clks IMX6SL_CLK_PWM1>, > + clocks = <&clks IMX6SL_CLK_PERCLK>, > <&clks IMX6SL_CLK_PWM1>; > clock-names = "ipg", "per"; It's a bit irritating that IMX6SL_CLK_PERCLK is used for the "ipg" clk, not the "per" clk. Is this correct? Best regards Uwe -- Pengutronix e.K. | Uwe Kleine-König | Industrial Linux Solutions | http://www.pengutronix.de/ |