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From: Daniel Vetter <daniel@ffwll.ch>
To: Shayenne Moura <shayenneluzmoura@gmail.com>
Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>,
	Maxime Ripard <maxime.ripard@bootlin.com>,
	Sean Paul <sean@poorly.run>, David Airlie <airlied@linux.ie>,
	linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org
Subject: Re: [PATCH 1/7] drm: msm: Delete base.id prints
Date: Wed, 19 Dec 2018 14:09:09 +0100	[thread overview]
Message-ID: <20181219130909.GO21184@phenom.ffwll.local> (raw)
In-Reply-To: <20181218133803.hfp62heugg4eeqcx@smtp.gmail.com>

On Tue, Dec 18, 2018 at 11:38:03AM -0200, Shayenne Moura wrote:
> This patch removes base.id prints from drm_display_mode
> objects in msm files. It removes dependency from drm_mode_object.
> 
> Signed-off-by: Shayenne Moura <shayenneluzmoura@gmail.com>

I think switching these over to the DRM_MODE_FMT and DRM_MODE_ARG like
drm_mode_debug_printmodeline() would be a really nice cleanup. Since you
need to touch them all anyway.

Same for all the other places that just print a modeline.
-Daniel


> ---
>  drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c         | 4 ++--
>  drivers/gpu/drm/msm/disp/mdp4/mdp4_dsi_encoder.c  | 4 ++--
>  drivers/gpu/drm/msm/disp/mdp4/mdp4_dtv_encoder.c  | 4 ++--
>  drivers/gpu/drm/msm/disp/mdp4/mdp4_lcdc_encoder.c | 4 ++--
>  drivers/gpu/drm/msm/disp/mdp5/mdp5_cmd_encoder.c  | 4 ++--
>  drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c         | 4 ++--
>  drivers/gpu/drm/msm/disp/mdp5/mdp5_encoder.c      | 4 ++--
>  drivers/gpu/drm/msm/dsi/dsi_manager.c             | 4 ++--
>  drivers/gpu/drm/msm/edp/edp_bridge.c              | 4 ++--
>  9 files changed, 18 insertions(+), 18 deletions(-)
> 
> diff --git a/drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c b/drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c
> index 457c29dba4a1..4d35fe5b8c07 100644
> --- a/drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c
> +++ b/drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c
> @@ -244,8 +244,8 @@ static void mdp4_crtc_mode_set_nofb(struct drm_crtc *crtc)
>  
>  	mode = &crtc->state->adjusted_mode;
>  
> -	DBG("%s: set mode: %d:\"%s\" %d %d %d %d %d %d %d %d %d %d 0x%x 0x%x",
> -			mdp4_crtc->name, mode->base.id, mode->name,
> +	DBG("%s: set mode: \"%s\" %d %d %d %d %d %d %d %d %d %d 0x%x 0x%x",
> +			mdp4_crtc->name, mode->name,
>  			mode->vrefresh, mode->clock,
>  			mode->hdisplay, mode->hsync_start,
>  			mode->hsync_end, mode->htotal,
> diff --git a/drivers/gpu/drm/msm/disp/mdp4/mdp4_dsi_encoder.c b/drivers/gpu/drm/msm/disp/mdp4/mdp4_dsi_encoder.c
> index 6a1ebdace391..a12ad73f08c7 100644
> --- a/drivers/gpu/drm/msm/disp/mdp4/mdp4_dsi_encoder.c
> +++ b/drivers/gpu/drm/msm/disp/mdp4/mdp4_dsi_encoder.c
> @@ -58,8 +58,8 @@ static void mdp4_dsi_encoder_mode_set(struct drm_encoder *encoder,
>  
>  	mode = adjusted_mode;
>  
> -	DBG("set mode: %d:\"%s\" %d %d %d %d %d %d %d %d %d %d 0x%x 0x%x",
> -			mode->base.id, mode->name,
> +	DBG("set mode: \"%s\" %d %d %d %d %d %d %d %d %d %d 0x%x 0x%x",
> +			mode->name,
>  			mode->vrefresh, mode->clock,
>  			mode->hdisplay, mode->hsync_start,
>  			mode->hsync_end, mode->htotal,
> diff --git a/drivers/gpu/drm/msm/disp/mdp4/mdp4_dtv_encoder.c b/drivers/gpu/drm/msm/disp/mdp4/mdp4_dtv_encoder.c
> index ba8e587f734b..3ace21e116a0 100644
> --- a/drivers/gpu/drm/msm/disp/mdp4/mdp4_dtv_encoder.c
> +++ b/drivers/gpu/drm/msm/disp/mdp4/mdp4_dtv_encoder.c
> @@ -104,8 +104,8 @@ static void mdp4_dtv_encoder_mode_set(struct drm_encoder *encoder,
>  
>  	mode = adjusted_mode;
>  
> -	DBG("set mode: %d:\"%s\" %d %d %d %d %d %d %d %d %d %d 0x%x 0x%x",
> -			mode->base.id, mode->name,
> +	DBG("set mode: \"%s\" %d %d %d %d %d %d %d %d %d %d 0x%x 0x%x",
> +			mode->name,
>  			mode->vrefresh, mode->clock,
>  			mode->hdisplay, mode->hsync_start,
>  			mode->hsync_end, mode->htotal,
> diff --git a/drivers/gpu/drm/msm/disp/mdp4/mdp4_lcdc_encoder.c b/drivers/gpu/drm/msm/disp/mdp4/mdp4_lcdc_encoder.c
> index 2bfb39082f54..21be7640d3a8 100644
> --- a/drivers/gpu/drm/msm/disp/mdp4/mdp4_lcdc_encoder.c
> +++ b/drivers/gpu/drm/msm/disp/mdp4/mdp4_lcdc_encoder.c
> @@ -273,8 +273,8 @@ static void mdp4_lcdc_encoder_mode_set(struct drm_encoder *encoder,
>  
>  	mode = adjusted_mode;
>  
> -	DBG("set mode: %d:\"%s\" %d %d %d %d %d %d %d %d %d %d 0x%x 0x%x",
> -			mode->base.id, mode->name,
> +	DBG("set mode: \"%s\" %d %d %d %d %d %d %d %d %d %d 0x%x 0x%x",
> +			mode->name,
>  			mode->vrefresh, mode->clock,
>  			mode->hdisplay, mode->hsync_start,
>  			mode->hsync_end, mode->htotal,
> diff --git a/drivers/gpu/drm/msm/disp/mdp5/mdp5_cmd_encoder.c b/drivers/gpu/drm/msm/disp/mdp5/mdp5_cmd_encoder.c
> index d6f79dc755b4..ac61a10b79cc 100644
> --- a/drivers/gpu/drm/msm/disp/mdp5/mdp5_cmd_encoder.c
> +++ b/drivers/gpu/drm/msm/disp/mdp5/mdp5_cmd_encoder.c
> @@ -134,8 +134,8 @@ void mdp5_cmd_encoder_mode_set(struct drm_encoder *encoder,
>  {
>  	mode = adjusted_mode;
>  
> -	DBG("set mode: %d:\"%s\" %d %d %d %d %d %d %d %d %d %d 0x%x 0x%x",
> -			mode->base.id, mode->name,
> +	DBG("set mode: \"%s\" %d %d %d %d %d %d %d %d %d %d 0x%x 0x%x",
> +			mode->name,
>  			mode->vrefresh, mode->clock,
>  			mode->hdisplay, mode->hsync_start,
>  			mode->hsync_end, mode->htotal,
> diff --git a/drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c b/drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c
> index b1da9ce54379..ef2ee5888777 100644
> --- a/drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c
> +++ b/drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c
> @@ -384,8 +384,8 @@ static void mdp5_crtc_mode_set_nofb(struct drm_crtc *crtc)
>  
>  	mode = &crtc->state->adjusted_mode;
>  
> -	DBG("%s: set mode: %d:\"%s\" %d %d %d %d %d %d %d %d %d %d 0x%x 0x%x",
> -			crtc->name, mode->base.id, mode->name,
> +	DBG("%s: set mode: \"%s\" %d %d %d %d %d %d %d %d %d %d 0x%x 0x%x",
> +			crtc->name, mode->name,
>  			mode->vrefresh, mode->clock,
>  			mode->hdisplay, mode->hsync_start,
>  			mode->hsync_end, mode->htotal,
> diff --git a/drivers/gpu/drm/msm/disp/mdp5/mdp5_encoder.c b/drivers/gpu/drm/msm/disp/mdp5/mdp5_encoder.c
> index fcd44d1d1068..b5e4ef236589 100644
> --- a/drivers/gpu/drm/msm/disp/mdp5/mdp5_encoder.c
> +++ b/drivers/gpu/drm/msm/disp/mdp5/mdp5_encoder.c
> @@ -118,8 +118,8 @@ static void mdp5_vid_encoder_mode_set(struct drm_encoder *encoder,
>  
>  	mode = adjusted_mode;
>  
> -	DBG("set mode: %d:\"%s\" %d %d %d %d %d %d %d %d %d %d 0x%x 0x%x",
> -			mode->base.id, mode->name,
> +	DBG("set mode: \"%s\" %d %d %d %d %d %d %d %d %d %d 0x%x 0x%x",
> +			mode->name,
>  			mode->vrefresh, mode->clock,
>  			mode->hdisplay, mode->hsync_start,
>  			mode->hsync_end, mode->htotal,
> diff --git a/drivers/gpu/drm/msm/dsi/dsi_manager.c b/drivers/gpu/drm/msm/dsi/dsi_manager.c
> index 80aa6344185e..e72ba60f4db8 100644
> --- a/drivers/gpu/drm/msm/dsi/dsi_manager.c
> +++ b/drivers/gpu/drm/msm/dsi/dsi_manager.c
> @@ -536,8 +536,8 @@ static void dsi_mgr_bridge_mode_set(struct drm_bridge *bridge,
>  	struct mipi_dsi_host *host = msm_dsi->host;
>  	bool is_dual_dsi = IS_DUAL_DSI();
>  
> -	DBG("set mode: %d:\"%s\" %d %d %d %d %d %d %d %d %d %d 0x%x 0x%x",
> -			mode->base.id, mode->name,
> +	DBG("set mode: \"%s\" %d %d %d %d %d %d %d %d %d %d 0x%x 0x%x",
> +			mode->name,
>  			mode->vrefresh, mode->clock,
>  			mode->hdisplay, mode->hsync_start,
>  			mode->hsync_end, mode->htotal,
> diff --git a/drivers/gpu/drm/msm/edp/edp_bridge.c b/drivers/gpu/drm/msm/edp/edp_bridge.c
> index 931a5c97cccf..160e8d91eda2 100644
> --- a/drivers/gpu/drm/msm/edp/edp_bridge.c
> +++ b/drivers/gpu/drm/msm/edp/edp_bridge.c
> @@ -60,8 +60,8 @@ static void edp_bridge_mode_set(struct drm_bridge *bridge,
>  	struct edp_bridge *edp_bridge = to_edp_bridge(bridge);
>  	struct msm_edp *edp = edp_bridge->edp;
>  
> -	DBG("set mode: %d:\"%s\" %d %d %d %d %d %d %d %d %d %d 0x%x 0x%x",
> -			mode->base.id, mode->name,
> +	DBG("set mode: \"%s\" %d %d %d %d %d %d %d %d %d %d 0x%x 0x%x",
> +			mode->name,
>  			mode->vrefresh, mode->clock,
>  			mode->hdisplay, mode->hsync_start,
>  			mode->hsync_end, mode->htotal,
> -- 
> 2.17.1
> 
> _______________________________________________
> dri-devel mailing list
> dri-devel@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/dri-devel

-- 
Daniel Vetter
Software Engineer, Intel Corporation
http://blog.ffwll.ch

      reply	other threads:[~2018-12-19 13:09 UTC|newest]

Thread overview: 2+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-12-18 13:38 Shayenne Moura
2018-12-19 13:09 ` Daniel Vetter [this message]

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