From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-13.6 required=3.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY, SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 2EBC8C43387 for ; Tue, 8 Jan 2019 19:31:34 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 009F6217D9 for ; Tue, 8 Jan 2019 19:31:34 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1546975894; bh=71bZYqIvrgLKtNHcvSBPT2C7oSSe2PEcWzz8UMCPeaE=; h=From:To:Cc:Subject:Date:In-Reply-To:References:List-ID:From; b=WHmPHmhHHWRCWl+/8ChU+3RBgFr4VfxblSFY/IQ4OA6aB3ST4UXnYdoHOdX6IUtEF Y/PcKVi4RU9giGO6AMGfOPYxvDSapu7FAnwuCu/NW3HmhVN6N4ggs8EQnX7tZMxckj cSmmbRzanRW+TixbLfyG+abhb82j6QRHkKNC0rlQ= Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1731118AbfAHTbc (ORCPT ); Tue, 8 Jan 2019 14:31:32 -0500 Received: from mail.kernel.org ([198.145.29.99]:39648 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1729987AbfAHTbb (ORCPT ); Tue, 8 Jan 2019 14:31:31 -0500 Received: from sasha-vm.mshome.net (c-73-47-72-35.hsd1.nh.comcast.net [73.47.72.35]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id 6B26F2070B; Tue, 8 Jan 2019 19:31:29 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1546975890; bh=71bZYqIvrgLKtNHcvSBPT2C7oSSe2PEcWzz8UMCPeaE=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=G4bL49YtCFod1OpwgEkVu4MaY3TgnVQn51W7JiPuG0IPQNQQTH6YGuTDq8GD3oIla hO3KcoNtV4/ZCkgQKbcvLF9ESorQPqOW88F7CILrPG+VMSw3VgTzNmRBTmupMnuYTn 5Wg+4HcIbe3abWzbP52JYdY4kNTdYuUsAtAG0mK8= From: Sasha Levin To: linux-kernel@vger.kernel.org, stable@vger.kernel.org Cc: Florian Fainelli , Will Deacon , Alexander Shishkin , Namhyung Kim , Peter Zijlstra , Arnaldo Carvalho de Melo , Sasha Levin Subject: [PATCH AUTOSEL 4.19 64/97] perf tests ARM: Disable breakpoint tests 32-bit Date: Tue, 8 Jan 2019 14:29:13 -0500 Message-Id: <20190108192949.122407-64-sashal@kernel.org> X-Mailer: git-send-email 2.19.1 In-Reply-To: <20190108192949.122407-1-sashal@kernel.org> References: <20190108192949.122407-1-sashal@kernel.org> MIME-Version: 1.0 X-Patchwork-Hint: Ignore Content-Transfer-Encoding: 8bit Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Florian Fainelli [ Upstream commit 24f967337f6d6bce931425769c0f5ff5cf2d212e ] The breakpoint tests on the ARM 32-bit kernel are broken in several ways. The breakpoint length requested does not necessarily match whether the function address has the Thumb bit (bit 0) set or not, and this does matter to the ARM kernel hw_breakpoint infrastructure. See [1] for background. [1]: https://lkml.org/lkml/2018/11/15/205 As Will indicated, the overflow handling would require single-stepping which is not supported at the moment. Just disable those tests for the ARM 32-bit platforms and update the comment above to explain these limitations. Co-developed-by: Will Deacon Signed-off-by: Florian Fainelli Signed-off-by: Will Deacon Acked-by: Jiri Olsa Cc: Alexander Shishkin Cc: Namhyung Kim Cc: Peter Zijlstra Link: http://lkml.kernel.org/r/20181203191138.2419-1-f.fainelli@gmail.com Signed-off-by: Arnaldo Carvalho de Melo Signed-off-by: Sasha Levin --- tools/perf/tests/bp_signal.c | 20 ++++++++++++++------ 1 file changed, 14 insertions(+), 6 deletions(-) diff --git a/tools/perf/tests/bp_signal.c b/tools/perf/tests/bp_signal.c index a467615c5a0e..910e25e64188 100644 --- a/tools/perf/tests/bp_signal.c +++ b/tools/perf/tests/bp_signal.c @@ -291,12 +291,20 @@ int test__bp_signal(struct test *test __maybe_unused, int subtest __maybe_unused bool test__bp_signal_is_supported(void) { -/* - * The powerpc so far does not have support to even create - * instruction breakpoint using the perf event interface. - * Once it's there we can release this. - */ -#if defined(__powerpc__) || defined(__s390x__) + /* + * PowerPC and S390 do not support creation of instruction + * breakpoints using the perf_event interface. + * + * ARM requires explicit rounding down of the instruction + * pointer in Thumb mode, and then requires the single-step + * to be handled explicitly in the overflow handler to avoid + * stepping into the SIGIO handler and getting stuck on the + * breakpointed instruction. + * + * Just disable the test for these architectures until these + * issues are resolved. + */ +#if defined(__powerpc__) || defined(__s390x__) || defined(__arm__) return false; #else return true; -- 2.19.1