From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.1 required=3.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY, SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 9BDACC282C8 for ; Mon, 28 Jan 2019 16:21:23 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 68C602084A for ; Mon, 28 Jan 2019 16:21:23 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1548692483; bh=RbHE7DCIflXIlM9QfbMFzIPSCrvDWk5tcxbj65R6y+8=; h=From:To:Cc:Subject:Date:In-Reply-To:References:List-ID:From; b=ML3fn6VES3lnMDEcyKw9UCV8V0AdqSm0qM8rMEt3nh0IY4qxe4mQdfgWI+drEPVh3 exVJTfeti4c4O8fBg3QgE9eUXJ5hO2/G3ZHV/4bWMVyQR5qZcXSKlXcApt1H7HLuGV l5BsXAEifRWpqPrIQIhRBJKqEsBsHgNzz1tGXRHo= Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2389014AbfA1QVV (ORCPT ); Mon, 28 Jan 2019 11:21:21 -0500 Received: from mail.kernel.org ([198.145.29.99]:57050 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2388573AbfA1QVU (ORCPT ); Mon, 28 Jan 2019 11:21:20 -0500 Received: from sasha-vm.mshome.net (c-73-47-72-35.hsd1.nh.comcast.net [73.47.72.35]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id 0DCBD2084A; Mon, 28 Jan 2019 16:21:17 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1548692479; bh=RbHE7DCIflXIlM9QfbMFzIPSCrvDWk5tcxbj65R6y+8=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=Fjq5UuX6GJoG2ezvrETOk5dOwpJ7O5l7yWeT1VLkNmLb9hKlOC/jufUf2DP5pQqx2 KzASW5L6W9tWDRjpMkwhIh1Lcf5UAclySF5e0lzYI4EFw/666s71LX8WaBDu2ZOLlV yCgLoHnVpFOjfakigvBKppadQA9VuFKiatT+PJSc= From: Sasha Levin To: linux-kernel@vger.kernel.org, stable@vger.kernel.org Cc: Mark Rutland , AKASHI Takahiro , Ard Biesheuvel , Catalin Marinas , Torsten Duwe , Will Deacon , Sasha Levin Subject: [PATCH AUTOSEL 4.9 034/107] arm64: ftrace: don't adjust the LR value Date: Mon, 28 Jan 2019 11:18:34 -0500 Message-Id: <20190128161947.57405-34-sashal@kernel.org> X-Mailer: git-send-email 2.19.1 In-Reply-To: <20190128161947.57405-1-sashal@kernel.org> References: <20190128161947.57405-1-sashal@kernel.org> MIME-Version: 1.0 X-Patchwork-Hint: Ignore Content-Transfer-Encoding: 8bit Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Mark Rutland [ Upstream commit 6e803e2e6e367db9a0d6ecae1bd24bb5752011bd ] The core ftrace code requires that when it is handed the PC of an instrumented function, this PC is the address of the instrumented instruction. This is necessary so that the core ftrace code can identify the specific instrumentation site. Since the instrumented function will be a BL, the address of the instrumented function is LR - 4 at entry to the ftrace code. This fixup is applied in the mcount_get_pc and mcount_get_pc0 helpers, which acquire the PC of the instrumented function. The mcount_get_lr helper is used to acquire the LR of the instrumented function, whose value does not require this adjustment, and cannot be adjusted to anything meaningful. No adjustment of this value is made on other architectures, including arm. However, arm64 adjusts this value by 4. This patch brings arm64 in line with other architectures and removes the adjustment of the LR value. Signed-off-by: Mark Rutland Cc: AKASHI Takahiro Cc: Ard Biesheuvel Cc: Catalin Marinas Cc: Torsten Duwe Cc: Will Deacon Signed-off-by: Will Deacon Signed-off-by: Sasha Levin --- arch/arm64/kernel/entry-ftrace.S | 1 - 1 file changed, 1 deletion(-) diff --git a/arch/arm64/kernel/entry-ftrace.S b/arch/arm64/kernel/entry-ftrace.S index aef02d2af3b5..7a87d32e98f4 100644 --- a/arch/arm64/kernel/entry-ftrace.S +++ b/arch/arm64/kernel/entry-ftrace.S @@ -78,7 +78,6 @@ .macro mcount_get_lr reg ldr \reg, [x29] ldr \reg, [\reg, #8] - mcount_adjust_addr \reg, \reg .endm .macro mcount_get_lr_addr reg -- 2.19.1