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From: Greg KH <greg@kroah.com>
To: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Cc: linux-kernel@vger.kernel.org, Marc Zyngier <marc.zyngier@arm.com>,
	stable@vger.kernel.org
Subject: Re: [PATCH] irqchip/gic-v3-its: Align PCI Multi-MSI allocation on their size
Date: Tue, 29 Jan 2019 10:47:42 +0100	[thread overview]
Message-ID: <20190129094742.GA22220@kroah.com> (raw)
In-Reply-To: <20190128170015.12253-1-ard.biesheuvel@linaro.org>

On Mon, Jan 28, 2019 at 06:00:15PM +0100, Ard Biesheuvel wrote:
> From: Marc Zyngier <marc.zyngier@arm.com>
> 
> Commit 8208d1708b88b412ca97f50a6d951242c88cbbac upstream.
> 
> The way we allocate events works fine in most cases, except
> when multiple PCI devices share an ITS-visible DevID, and that
> one of them is trying to use MultiMSI allocation.
> 
> In that case, our allocation is not guaranteed to be zero-based
> anymore, and we have to make sure we allocate it on a boundary
> that is compatible with the PCI Multi-MSI constraints.
> 
> Fix this by allocating the full region upfront instead of iterating
> over the number of MSIs. MSI-X are always allocated one by one,
> so this shouldn't change anything on that front.
> 
> Fixes: b48ac83d6bbc2 ("irqchip: GICv3: ITS: MSI support")
> Cc: <stable@vger.kernel.org> # v4.4 - v4.9
> Reported-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
> Tested-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
> [ardb: rebased onto v4.9.153, should apply cleanly onto v4.4.y as well]
> Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
> ---
>  drivers/irqchip/irq-gic-v3-its.c | 25 ++++++++++----------
>  1 file changed, 13 insertions(+), 12 deletions(-)

Now queued up, thanks.

greg k-h

      reply	other threads:[~2019-01-29  9:47 UTC|newest]

Thread overview: 2+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-01-28 17:00 Ard Biesheuvel
2019-01-29  9:47 ` Greg KH [this message]

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