From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.0 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY,SPF_PASS,URIBL_BLOCKED, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 529F8C282D5 for ; Wed, 30 Jan 2019 08:42:46 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 2D5CB21473 for ; Wed, 30 Jan 2019 08:42:46 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1730504AbfA3Imp (ORCPT ); Wed, 30 Jan 2019 03:42:45 -0500 Received: from mirror2.csie.ntu.edu.tw ([140.112.30.76]:60790 "EHLO wens.csie.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1730279AbfA3ImX (ORCPT ); Wed, 30 Jan 2019 03:42:23 -0500 Received: by wens.csie.org (Postfix, from userid 1000) id DBF0D5FD57; Wed, 30 Jan 2019 16:42:17 +0800 (CST) From: Chen-Yu Tsai To: Maxime Ripard Cc: linux-sunxi@googlegroups.com, Icenowy Zheng , Andre Przywara , Emmanuel Vadot , Jagan Teki , Sergey Matyukevich , Hauke Mehrtens , Chen-Yu Tsai , linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 06/10] arm64: dts: allwinner: h5: orange-pi-zero-plus2: Add CPU regulator supply Date: Wed, 30 Jan 2019 16:41:59 +0800 Message-Id: <20190130084203.25053-7-wens@csie.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20190130084203.25053-1-wens@csie.org> References: <20190130084203.25053-1-wens@csie.org> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The OrangePi Zero Plus 2 uses a fixed regulator to supply the CPU cores. The feedback resistor network can be changed by toggling a GPIO line. This is effectively a GPIO controlled regulator that can change between roughly 1.1V and 1.3V. The actual voltage is slightly higher. The values used in the device tree description are based on calculations using the resistor values from the schematics. Cc: Jagan Teki Cc: Sergey Matyukevich Signed-off-by: Chen-Yu Tsai --- This patch is based on the schematics and has not been tested on an actual board. --- .../sun50i-h5-orangepi-zero-plus2.dts | 20 +++++++++++++++++++ 1 file changed, 20 insertions(+) diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-zero-plus2.dts b/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-zero-plus2.dts index 53c8c11620e0..801c681307ef 100644 --- a/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-zero-plus2.dts +++ b/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-zero-plus2.dts @@ -76,6 +76,22 @@ regulator-max-microvolt = <3300000>; }; + reg_vdd_cpux: vdd-cpux { + compatible = "regulator-gpio"; + regulator-name = "vdd-cpux"; + regulator-type = "voltage"; + regulator-boot-on; + regulator-always-on; + regulator-min-microvolt = <1108475>; + regulator-max-microvolt = <1307810>; + regulator-ramp-delay = <50>; /* 4ms */ + enable-gpios = <&r_pio 0 8 GPIO_ACTIVE_HIGH>; /* PL8 */ + gpios = <&r_pio 0 1 GPIO_ACTIVE_HIGH>; /* PL6 */ + gpios-states = <0x1>; + states = <1108475 0x0 + 1307810 0x1>; + }; + wifi_pwrseq: wifi_pwrseq { compatible = "mmc-pwrseq-simple"; pinctrl-names = "default"; @@ -84,6 +100,10 @@ }; }; +&cpu0 { + cpu-supply = <®_vdd_cpux>; +}; + &de { status = "okay"; }; -- 2.20.1