From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-3.0 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, MAILING_LIST_MULTI,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 0B3E3C282C4 for ; Tue, 12 Feb 2019 13:52:50 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id D49F52080A for ; Tue, 12 Feb 2019 13:52:49 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1730027AbfBLNwO (ORCPT ); Tue, 12 Feb 2019 08:52:14 -0500 Received: from mx08-00178001.pphosted.com ([91.207.212.93]:36390 "EHLO mx07-00178001.pphosted.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1729889AbfBLNwO (ORCPT ); Tue, 12 Feb 2019 08:52:14 -0500 Received: from pps.filterd (m0046661.ppops.net [127.0.0.1]) by mx08-00178001.pphosted.com (8.16.0.27/8.16.0.27) with SMTP id x1CDpWEw001497; Tue, 12 Feb 2019 14:52:01 +0100 Received: from beta.dmz-eu.st.com (beta.dmz-eu.st.com [164.129.1.35]) by mx08-00178001.pphosted.com with ESMTP id 2qjfy65318-1 (version=TLSv1 cipher=ECDHE-RSA-AES256-SHA bits=256 verify=NOT); Tue, 12 Feb 2019 14:52:01 +0100 Received: from zeta.dmz-eu.st.com (zeta.dmz-eu.st.com [164.129.230.9]) by beta.dmz-eu.st.com (STMicroelectronics) with ESMTP id E7CD938; Tue, 12 Feb 2019 13:52:00 +0000 (GMT) Received: from Webmail-eu.st.com (sfhdag4node2.st.com [10.75.127.11]) by zeta.dmz-eu.st.com (STMicroelectronics) with ESMTP id BA6225125; Tue, 12 Feb 2019 13:52:00 +0000 (GMT) Received: from localhost (10.75.127.49) by SFHDAG4NODE2.st.com (10.75.127.11) with Microsoft SMTP Server (TLS) id 15.0.1347.2; Tue, 12 Feb 2019 14:52:00 +0100 From: To: Michael Turquette , Stephen Boyd , Maxime Coquelin , Alexandre Torgue CC: , , , , Gabriel Fernandez Subject: [PATCH 0/7] update STM32MP1 clocks Date: Tue, 12 Feb 2019 14:51:47 +0100 Message-ID: <20190212135154.2733-1-gabriel.fernandez@st.com> X-Mailer: git-send-email 2.17.0 MIME-Version: 1.0 Content-Type: text/plain X-Originating-IP: [10.75.127.49] X-ClientProxiedBy: SFHDAG1NODE2.st.com (10.75.127.2) To SFHDAG4NODE2.st.com (10.75.127.11) X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:,, definitions=2019-02-12_08:,, signatures=0 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Gabriel Fernandez This patch-set fixes minor corrections (fixes and documentation alignment) - add missing parent clocks - don't change parent on set rate for kernel clocks - set ck_csi clock as critical - fix divider configuration Gabriel Fernandez (7): clk: stm32mp1: parent clocks update clk: stm32mp1: add CLK_SET_RATE_NO_REPARENT to Kernel clocks clk: stm32mp1: set ck_csi as critical clock clk: stm32mp1: fix mcu divider table clk: stm32mp1: fix HSI divider flag clk: stm32mp1: remove unnecessary CLK_DIVIDER_ALLOW_ZERO flag clk: stm32mp1: fix bit width of hse_rtc divider drivers/clk/clk-stm32mp1.c | 36 +++++++++++++++++++----------------- 1 file changed, 19 insertions(+), 17 deletions(-) -- 2.17.0