From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.0 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY,SPF_PASS autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id AE0C9C43381 for ; Mon, 18 Feb 2019 12:04:48 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 7F8842176F for ; Mon, 18 Feb 2019 12:04:48 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1730431AbfBRMEq convert rfc822-to-8bit (ORCPT ); Mon, 18 Feb 2019 07:04:46 -0500 Received: from skedge04.snt-world.com ([91.208.41.69]:49908 "EHLO skedge04.snt-world.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728781AbfBRMEq (ORCPT ); Mon, 18 Feb 2019 07:04:46 -0500 Received: from sntmail12r.snt-is.com (unknown [10.203.32.182]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by skedge04.snt-world.com (Postfix) with ESMTPS id 03C35805927; Mon, 18 Feb 2019 13:04:44 +0100 (CET) Received: from sntmail12r.snt-is.com (10.203.32.182) by sntmail12r.snt-is.com (10.203.32.182) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.1713.5; Mon, 18 Feb 2019 13:04:43 +0100 Received: from sntmail12r.snt-is.com ([fe80::e551:8750:7bba:3305]) by sntmail12r.snt-is.com ([fe80::e551:8750:7bba:3305%3]) with mapi id 15.01.1713.004; Mon, 18 Feb 2019 13:04:43 +0100 From: Schrempf Frieder To: "Tudor.Ambarus@microchip.com" , Marek Vasut CC: Schrempf Frieder , David Woodhouse , Brian Norris , "Boris Brezillon" , Richard Weinberger , "linux-mtd@lists.infradead.org" , "linux-kernel@vger.kernel.org" Subject: [PATCH v2 1/2] mtd: spi-nor: Add support for EN25Q80A Thread-Topic: [PATCH v2 1/2] mtd: spi-nor: Add support for EN25Q80A Thread-Index: AQHUx4IiJS154BEowUOup13mq/gQ7g== Date: Mon, 18 Feb 2019 12:04:43 +0000 Message-ID: <20190218120421.5034-1-frieder.schrempf@kontron.de> Accept-Language: de-DE, en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-originating-ip: [172.25.9.43] x-c2processedorg: 51b406b7-48a2-4d03-b652-521f56ac89f3 Content-Type: text/plain; charset="iso-8859-1" Content-Transfer-Encoding: 8BIT MIME-Version: 1.0 X-SnT-MailScanner-Information: Please contact the ISP for more information X-SnT-MailScanner-ID: 03C35805927.A00F0 X-SnT-MailScanner: Not scanned: please contact your Internet E-Mail Service Provider for details X-SnT-MailScanner-SpamCheck: X-SnT-MailScanner-From: frieder.schrempf@kontron.de X-SnT-MailScanner-To: bbrezillon@kernel.org, computersforpeace@gmail.com, dwmw2@infradead.org, linux-kernel@vger.kernel.org, linux-mtd@lists.infradead.org, marek.vasut@gmail.com, richard@nod.at, tudor.ambarus@microchip.com Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Frieder Schrempf This adds support for the EON EN25Q80A, a 8Mb SPI NOR chip. It is used on i.MX6 boards by Kontron Electronics GmbH (N60xx, N61xx). It was only tested with a single data line connected, by writing and reading random data with dd. Signed-off-by: Frieder Schrempf --- Changes in v2: ============== * Add information about boards using the chip and testing to the commit message * Remove SPI_NOR_QUAD_READ as the chip does not support 1_1_4 read command (0x6b) * Move the entry after en25q64 for alphabetical order --- drivers/mtd/spi-nor/spi-nor.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/mtd/spi-nor/spi-nor.c b/drivers/mtd/spi-nor/spi-nor.c index 6e13bbd1aaa5..7d7436facc57 100644 --- a/drivers/mtd/spi-nor/spi-nor.c +++ b/drivers/mtd/spi-nor/spi-nor.c @@ -1740,6 +1740,8 @@ static const struct flash_info spi_nor_ids[] = { { "en25q32b", INFO(0x1c3016, 0, 64 * 1024, 64, 0) }, { "en25p64", INFO(0x1c2017, 0, 64 * 1024, 128, 0) }, { "en25q64", INFO(0x1c3017, 0, 64 * 1024, 128, SECT_4K) }, + { "en25q80a", INFO(0x1c3014, 0, 64 * 1024, 16, + SECT_4K | SPI_NOR_DUAL_READ) }, { "en25qh32", INFO(0x1c7016, 0, 64 * 1024, 64, 0) }, { "en25qh128", INFO(0x1c7018, 0, 64 * 1024, 256, 0) }, { "en25qh256", INFO(0x1c7019, 0, 64 * 1024, 512, 0) }, -- 2.17.1